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edneymatheus/README.md

Édney Matheus Viana Freitas

Electrical Engineer | Master's Student in Microelectronics

Researcher in Microelectronics and Telecommunications

About Me

I am a 25-year-old electrical engineer from Brazil, currently pursuing a master's degree in Microelectronics at the University of SĂŁo Paulo (USP). My research interests include RF design, VLSI, signal processing, and software-defined radio (SDR). I am passionate about exploring the intersection of hardware and software to develop innovative solutions in telecommunications and integrated circuit design.

I have hands-on experience in circuit design, FPGA, MATLAB, Python, and currently expanding my skills in VHDL and assembly programming.

Skills

  • Programming: Python, MATLAB, Assembly
  • Hardware Design: VHDL, Verilog, VLSI Design, FPGA
  • Software Tools: Cadence Virtuoso, Innovus, Genus
  • Research Areas: SDR, RF design, Microelectronics, Biomedical Applications

Projects in Focus

  • SDR Applications with BladeRF: Developed MATLAB scripts for signal modulation, using BladeRF for transmission and verification through oscilloscopes.

(For a complete list of projects, visit my GitHub Repositories.)

Currently Studying

  • Advanced VLSI Design: Exploring CMOS technology for integrated circuit design using Cadence tools.
  • SDR and RF Applications: Testing and implementing SDR communication systems for imaging and telecommunications.
  • Assembly Programming: Enhancing my knowledge of low-level programming for hardware control.

Contact

Feel free to connect with me on:

Popular repositories Loading

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