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Use 32-bit XORRegReg to zero registers on x64 #7331

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merged 1 commit into from
May 16, 2024
Merged

Use 32-bit XORRegReg to zero registers on x64 #7331

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4 changes: 2 additions & 2 deletions compiler/x/codegen/BinaryEvaluator.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2151,7 +2151,7 @@ TR::Register *OMR::X86::TreeEvaluator::signedIntegerDivOrRemAnalyser(TR::Node *n
// MIN_INT or MIN_LONG divisor
//
TR::Register *quotientRegister = cg->allocateRegister();
generateRegRegInstruction(TR::InstOpCode::XORRegReg(nodeIs64Bit), node, quotientRegister, quotientRegister, cg);
generateRegRegInstruction(TR::InstOpCode::XOR4RegReg, node, quotientRegister, quotientRegister, cg);

if (nodeIs64Bit)
{
Expand Down Expand Up @@ -2387,7 +2387,7 @@ TR::Register *OMR::X86::TreeEvaluator::integerDivOrRemEvaluator(TR::Node *node,
//
if (!nodeIs64Bit && node->isUnsigned())
{
generateRegRegInstruction(TR::InstOpCode::XORRegReg(nodeIs64Bit), node, edxRegister, edxRegister, edxDeps, cg);
generateRegRegInstruction(TR::InstOpCode::XOR4RegReg, node, edxRegister, edxRegister, edxDeps, cg);

if (divisorRegister)
{
Expand Down
2 changes: 1 addition & 1 deletion compiler/x/codegen/FPTreeEvaluator.cpp
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Expand Up @@ -284,7 +284,7 @@ TR::Register *OMR::X86::TreeEvaluator::floatingPointStoreEvaluator(TR::Node *nod
TR::Register *floatConstReg = cg->allocateRegister(TR_GPR);
if (valueChild->getLongInt() == 0)
{
generateRegRegInstruction(TR::InstOpCode::XOR8RegReg, node, floatConstReg, floatConstReg, cg);
generateRegRegInstruction(TR::InstOpCode::XOR4RegReg, node, floatConstReg, floatConstReg, cg);
}
else
{
Expand Down
8 changes: 4 additions & 4 deletions compiler/x/codegen/OMRTreeEvaluator.cpp
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Expand Up @@ -2441,7 +2441,7 @@ static void arraySetToZeroForShortConstantArrays(TR::Node* node, TR::Register* a
if (size < 16)
{
tempReg = cg->allocateRegister();
generateRegRegInstruction(TR::InstOpCode::XOR8RegReg, node, tempReg, tempReg, cg);
generateRegRegInstruction(TR::InstOpCode::XOR4RegReg, node, tempReg, tempReg, cg);
int32_t index = 0;
int8_t packs[4] = {8, 4, 2, 1};

Expand Down Expand Up @@ -4714,7 +4714,7 @@ OMR::X86::TreeEvaluator::bitpermuteEvaluator(TR::Node *node, TR::CodeGenerator *

// Zero result reg
TR::Register *resultReg = cg->allocateRegister(TR_GPR);
generateRegRegInstruction(TR::InstOpCode::XORRegReg(nodeIs64Bit), node, resultReg, resultReg, cg);
generateRegRegInstruction(TR::InstOpCode::XOR4RegReg, node, resultReg, resultReg, cg);

if (length->getOpCode().isLoadConst())
{
Expand All @@ -4724,7 +4724,7 @@ OMR::X86::TreeEvaluator::bitpermuteEvaluator(TR::Node *node, TR::CodeGenerator *
{
// Zero tmpReg if SET won't do it
if (x >= 8)
generateRegRegInstruction(TR::InstOpCode::XORRegReg(nodeIs64Bit), node, tmpReg, tmpReg, cg);
generateRegRegInstruction(TR::InstOpCode::XOR4RegReg, node, tmpReg, tmpReg, cg);

TR::MemoryReference *sourceMR = generateX86MemoryReference(addrReg, x, cg);
generateRegMemInstruction(TR::InstOpCode::L1RegMem, node, tmpReg, sourceMR, cg);
Expand Down Expand Up @@ -4768,7 +4768,7 @@ OMR::X86::TreeEvaluator::bitpermuteEvaluator(TR::Node *node, TR::CodeGenerator *
generateRegImmInstruction(TR::InstOpCode::SUB4RegImm4, node, indexReg, 1, cg);

// Load the byte, test the bit and set
generateRegRegInstruction(TR::InstOpCode::XORRegReg(nodeIs64Bit), node, tmpReg, tmpReg, cg);
generateRegRegInstruction(TR::InstOpCode::XOR4RegReg, node, tmpReg, tmpReg, cg);
TR::MemoryReference *sourceMR = generateX86MemoryReference(addrReg, indexReg, 0, 0, cg);
generateRegMemInstruction(TR::InstOpCode::L1RegMem, node, tmpReg, sourceMR, cg);
generateRegRegInstruction(TR::InstOpCode::BTRegReg(nodeIs64Bit), node, valueReg, tmpReg, cg);
Expand Down
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