AArch64: Improve arraycopy inlining

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This commit improves the inlined code of arraycopy for AArch64, by using ldp/stp instructions with a pair of SIMD registers, which can load/store 32 bytes at a time.

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Jenkins build aarch64,amac

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See the sample code generated for copying 290 bytes forward.
In this code, x1 is the src address and x2 is the dst address. q0 and q1 are 128-bit SIMD registers. Less iterations in the loop (4->2), and fewer instructions (-2).

Existing implementation:

	mov	x0, #4	// loop count
loop:
	// Copy 16x4 bytes in the loop
	ldr	q0, [x1], #16
	str	q0, [x2], #16
	ldr	q0, [x1], #16
	str	q0, [x2], #16
	ldr	q0, [x1], #16
	str	q0, [x2], #16
	ldr	q0, [x1], #16
	str	q0, [x2], #16
	sub	x0, x0, #1
	cbnz	x0, loop
	// Copy remaining 34 bytes
	ldr	q0, [x1, #0]
	str	q0, [x2, #0]
	ldr	q0, [x1, #16]
	str	q0, [x2, #16]
	ldrh	w3, [x1, #32]
	strh	w3, [x2, #32]

New implementation:

	mov	x0, #2	// loop count
loop:
	// Copy 32x4 bytes in the loop
	ldp	q0, q1, [x1], #32
	stp	q0, q1, [x2], #32
	ldp	q0, q1, [x1], #32
	stp	q0, q1, [x2], #32
	ldp	q0, q1, [x1], #32
	stp	q0, q1, [x2], #32
	ldp	q0, q1, [x1], #32
	sub	x0, x0, #1
	stp	q0, q1, [x2], #32
	cbnz	x0, loop
	// Copy remaining 34 bytes
	ldp	q0, q1, [x1], #32
	stp	q0, q1, [x2], #32
	ldrh	w0, [x1, #0]
	strh	w0, [x2, #0]

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See #7181 for the failure on x86 macOS.
I ran OpenJ9 sanity.functional and sanity.openjdk on AArch64 Linux and macOS with this change, and the jobs finished successfully.

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@0xdaryl Please review.