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(0.47.0) Disable TLH prefetching for portable AOT code #20051

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Aug 23, 2024
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14 changes: 10 additions & 4 deletions runtime/compiler/control/J9Options.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2179,15 +2179,21 @@ void J9::Options::preProcessTLHPrefetch(J9JavaVM *vm)
#elif defined(TR_HOST_ARM64)
preferTLHPrefetch = true;
#else // TR_HOST_X86
preferTLHPrefetch =
(TR::Compiler->target.cpu.isGenuineIntel() &&
TR::Compiler->target.cpu.isAtMost(OMR_PROCESSOR_X86_INTEL_BROADWELL)) ||
!TR::Compiler->target.cpu.isGenuineIntel();
preferTLHPrefetch = !TR::Compiler->target.cpu.isGenuineIntel() ||
TR::Compiler->target.cpu.isAtMost(OMR_PROCESSOR_X86_INTEL_BROADWELL);

// Disable TM on x86 because we cannot tell whether a Haswell chip supports
// TM or not, plus it's killing the performance on dayTrader3
self()->setOption(TR_DisableTM);
#endif
// For portable AOT code we want to disable TLH prefetch
if (preferTLHPrefetch &&
J9_ARE_ANY_BITS_SET(vm->extendedRuntimeFlags2, J9_EXTENDED_RUNTIME2_ENABLE_PORTABLE_SHARED_CACHE) &&
self() == TR::Options::getAOTCmdLineOptions()
)
{
preferTLHPrefetch = false;
}

IDATA notlhPrefetch = FIND_ARG_IN_VMARGS(EXACT_MATCH, J9::Options::_externalOptionStrings[J9::ExternalOptions::XnotlhPrefetch], 0);
IDATA tlhPrefetch = FIND_ARG_IN_VMARGS(EXACT_MATCH, J9::Options::_externalOptionStrings[J9::ExternalOptions::XtlhPrefetch], 0);
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2 changes: 1 addition & 1 deletion runtime/compiler/runtime/RelocationRuntime.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -938,7 +938,7 @@ TR_RelocationRuntime::generateFeatureFlags(TR_FrontEnd *fe)
if (TR::Options::getCmdLineOptions()->getOption(TR_DisableTraps))
featureFlags |= TR_FeatureFlag_DisableTraps;

if (TR::Options::getCmdLineOptions()->getOption(TR_TLHPrefetch))
if (TR::Options::getAOTCmdLineOptions()->getOption(TR_TLHPrefetch))
featureFlags |= TR_FeatureFlag_TLHPrefetch;

if (TR::CodeCacheManager::instance()->codeCacheConfig().needsMethodTrampolines())
Expand Down