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Cache misses seem to double in cache protocol #24

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michaelni opened this issue Apr 4, 2016 · 1 comment
Open

Cache misses seem to double in cache protocol #24

michaelni opened this issue Apr 4, 2016 · 1 comment

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@michaelni
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libavformat/seek-test cache:/ld/michael/videos/Hellboy.ts
[cache @ 0x2bf0760] Statistics, cache hits:118 cache misses:170
vs.
[cache @ 0x27ed760] Statistics, cache hits:118 cache misses:69

http://samples.ffmpeg.org/HDTV/Hellboy.ts

seems not to happen with matrixbench
not sure if this is a real issue, but i saw it so i report it

@ghost ghost added the unimportant label Apr 4, 2016
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ghost commented Apr 4, 2016

Certainly nothing that would block a merge. Can be fixed later if a real issue.

dwbuiten pushed a commit that referenced this issue Oct 1, 2024
Use the "ldur" instruction explicitly, instead of having the
assembler implicitly convert "ldr" instructions to "ldur".

This fixes build errors like these:

libavcodec\aarch64\vvc\alf.o.asm(1023) : error A2518: operand 2: Memory offset must be aligned
        ldr             q22, [x3, #24]
libavcodec\aarch64\vvc\alf.o.asm(1024) : error A2518: operand 2: Memory offset must be aligned
        ldr             q24, [x2, #24]
libavcodec\aarch64\vvc\alf.o.asm(1393) : error A2518: operand 2: Memory offset must be aligned
        ldr             q22, [x3, #24]
libavcodec\aarch64\vvc\alf.o.asm(1394) : error A2518: operand 2: Memory offset must be aligned
        ldr             q24, [x2, #24]

Signed-off-by: Martin Storsjö <martin@martin.st>
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