[NativeAOT] 32-bit platform ObjWriter and bit rot fixes #96890

filipnavara · 2024-01-12T10:31:11Z

Fixes enough of the code to get "Hello World" up and running on NativeAOT / linux-arm. I was testing on the "DwarfDump" smoke test and even the LLDB debugging works quite well. Got all the way to RhThrowEx which reaches the unimplemented parts of unwinding and exception handling.

Generally speaking, it seems to be possible to use the DWARF unwinding by enabling the support here. ~~It still fails on the first attempt to unwind a frame with some bogus values in the registers, but it does seem to look up the LSDA pointers at least.~~

…ulations

…dends to account for R2R ABI differences; use inline addend for 32-bit platforms; mark function symbols as Thumb code on ARM

ghost · 2024-01-12T10:31:22Z

Tagging subscribers to this area: @agocke, @MichalStrehovsky, @jkotas
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Issue Details

null

Author:	filipnavara
Assignees:	-
Labels:	`community-contribution`, `area-NativeAOT-coreclr`
Milestone:	-

… as R2R

…rned; the should not get the symbol size or the Thumb bit

filipnavara · 2024-01-13T15:10:19Z

src/coreclr/tools/Common/Compiler/DependencyAnalysis/Target_ARM/ARMEmitter.cs

+            if (destination <= Register.R7)
+            {
+                Builder.EmitShort(unchecked((short)(0x4478u + (byte)destination)));
+            }
+            else
+            {
+                Builder.EmitShort(unchecked((short)(0x44f0u + (byte)destination)));
+            }


Review note: This affects R2R. It generates the same pattern as the JIT but it's one extra instruction. If you feel like we need to special-case it, I'll try to do it.

I think it is fine. This pattern is better for private working set.

src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/Dwarf/DwarfCie.cs

…oment)

filipnavara · 2024-01-14T09:26:28Z

src/coreclr/nativeaot/BuildIntegration/Microsoft.NETCore.Native.Unix.targets

+      <CrossCompileArch Condition="$(CrossCompileRid.EndsWith('-arm'))">arm</CrossCompileArch>
+
+      <CrossCompileAbi>gnu</CrossCompileAbi>
+      <CrossCompileAbi Condition="$(CrossCompileRid.EndsWith('-arm'))">gnueabihf</CrossCompileAbi>

      <TargetTriple />
-      <TargetTriple Condition="'$(CrossCompileArch)' != ''">$(CrossCompileArch)-linux-gnu</TargetTriple>
+      <TargetTriple Condition="'$(CrossCompileArch)' != ''">$(CrossCompileArch)-linux-$(CrossCompileAbi)</TargetTriple>


@am11 care to review this part?

This looks good and neat. Other related/interesting triplets are:

arm-linux-androideabi arm-unknown-linux-gnueabi arm-unknown-linux-gnueabihf arm-unknown-linux-musleabi arm-unknown-linux-musleabihf armv7-unknown-linux-gnueabi armv7-unknown-linux-gnueabihf armv7-unknown-linux-musleabi armv7-unknown-linux-musleabihf

of which, maybe <CrossCompileAbi Condition="'$(CrossCompileRid)' == 'linux-musl-arm'">musleabihf</CrossCompileAbi> could be added? We have prereq docker image available for it as well.

Side note:
AFAIK, triplet is considered an archaic concept by some toolchain enthusiasts. They recommend using explicit -march, -mtune, -mabi, -mcpu and -mfpu options. At some point we can delve into that and bring nativeaot and mono targets to new age. :)

I guess I'll have some follow up PRs later on, so I can add the "musl" then.

No problem, take your time. Basically the next line (49) can be deleted after that, since alpine is unnecessary and more restrictive than unknown or not setting the vendor at all; which we have for gnu and bionic.

src/coreclr/nativeaot/Runtime/unix/unixasmmacrosarm.inc

Co-authored-by: Jan Kotas <jkotas@microsoft.com>

src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ObjectWriter.cs

Co-authored-by: Michal Strehovský <MichalStrehovsky@users.noreply.github.com>

filipnavara · 2024-01-15T15:25:14Z

src/coreclr/jit/unwind.cpp

@@ -203,19 +197,20 @@ void Compiler::unwindBegPrologCFI()

 void Compiler::unwindPushPopMaskCFI(regMaskTP regMask, bool isFloat)


Review note: This method is only ever called for TARGET_ARM. The order of registers was opposite to the one expected in DWARF. Along with the change in unwindPushPopCFI it now fixes the ARM target to generate correct DWARF descriptors.

Both of these issues were previously masked by the counter part code in ObjWriter that converted DWARF codes to EHABI. Notably it reversed the register order at each code offset, and the .regsave opcode in the EHABI assembly automatically moved the call frame pointer by the register size.

filipnavara · 2024-01-15T17:19:17Z

Rough status of the linux-arm bring up:

Some of the assembler code is not position independent. It's relatively easy fix, keeping it for next round. Current workaround: Compile with PositionIndependentExecutable=false
FEATURE_64BIT_ALIGNMENT seems not to be defined for the GC and it sometimes triggers asserts. Current workaround: Define it in the CMakeLists.txt
Exception unwinding doesn't work. Current workaround: Enable DWARF unwinder here. Ideally, we would emit EHABI exception data but it's not necessary for now. Both lld and lldb know how to work with DWARF so linking and debugging works.
~~Exception handler address is misinterpreted somewhere (off by few bytes), so instructions at wrong address are executed.~~ Exception handler return address is misinterpreted somewhere, so the app crashes after executing catch handler. Turns out the issue is that an address of a method is loaded with MOVW/MOVT instruction pair with a relocation and it's missing the thumb bit; later RhpCallCatchFunclet calls it with bx r4 and switches the processor to wrong mode.
Some assembly helpers are missing.
GC asserts on executionAborted

jkotas

LGTM. Thank you!

filipnavara · 2024-01-16T11:54:25Z

Turns out the issue is that an address of a method is loaded with MOVW/MOVT instruction pair with a relocation and it's missing the thumb bit; later RhpCallCatchFunclet calls it with bx r4 and switches the processor to wrong mode.

I have a fix/workaround that I will submit in subsequent PR. There's a bug in the LLD linker in the way how it resolves R_ARM_THM_MOVW_PREL_NC relocations. Instead of ((S + A) | T) – P it's resolved as (((S | T) + A)) – P (S | T is already in the symbol table, so that's not an explicit expression in the LLD code). RyuJIT generates the thumb bit in the embedded addend which is quite unusual but not prohibited.

jkotas · 2024-01-16T21:40:18Z

license/cla bot is stuck...

* Use PC-relative relocations for ARMEmitter.EmitMOV(dest, symbol) * Fix handling of signed offsets in IMAGE_REL_BASED_THUMB_BRANCH24 calculations * Generate position independent code in NativeAOT on linux-arm * Handle ARM32 in DwarfCie * Fix relocations emitted in 32-bit ELF for x86/arm32; apply correct addends to account for R2R ABI differences; use inline addend for 32-bit platforms; mark function symbols as Thumb code on ARM * ELF/ARM32: Emit thumb mapping symbols for executable sections * Try to revert ARMEmitter.EmitMOV * Convert IMAGE_REL_BASED_THUMB_MOV32_PCREL to ELF with the same offset as R2R * Unoptimal, but working, version of INLINE_GET_TLS_VAR for ARM32 * Use PC-relative relocations for ARMEmitter.EmitMOV(dest, symbol) * Fat function pointers are not function symbols as far as ELF is concerned; the should not get the symbol size or the Thumb bit * Fix some bits and pieces of the ARM unwinding code * Don't try to use ObjWriter package on unsupported platforms * Generate valid ARM32 DWARF unwind info in JIT * Handle negative offsets in CFI_REL_OFFSET conversion (unused at the moment) * Add linux-arm support to cross-compile targets * Update src/coreclr/nativeaot/Runtime/unix/unixasmmacrosarm.inc Co-authored-by: Jan Kotas <jkotas@microsoft.com> * Update ObjectWriter.cs Co-authored-by: Michal Strehovský <MichalStrehovsky@users.noreply.github.com> * Fix the order of register push in CFI unwind codes on ARM. * Make jit-format happy without making the code look ugly --------- Co-authored-by: Jan Kotas <jkotas@microsoft.com> Co-authored-by: Michal Strehovský <MichalStrehovsky@users.noreply.github.com>

filipnavara added 5 commits January 12, 2024 11:23

Use PC-relative relocations for ARMEmitter.EmitMOV(dest, symbol)

f4974b7

Fix handling of signed offsets in IMAGE_REL_BASED_THUMB_BRANCH24 calc…

0e5eae4

…ulations

Generate position independent code in NativeAOT on linux-arm

47eaebc

Handle ARM32 in DwarfCie

24c2a5d

Fix relocations emitted in 32-bit ELF for x86/arm32; apply correct ad…

5340bb6

…dends to account for R2R ABI differences; use inline addend for 32-bit platforms; mark function symbols as Thumb code on ARM

ghost added the community-contribution Indicates that the PR has been added by a community member label Jan 12, 2024

dotnet-issue-labeler bot added the area-NativeAOT-coreclr label Jan 12, 2024

filipnavara added the NO-REVIEW Experimental/testing PR, do NOT review it label Jan 12, 2024

ELF/ARM32: Emit thumb mapping symbols for executable sections

1d3e590

build-analysis bot mentioned this pull request Jan 12, 2024

LibraryImportGenerator unit test segfault illegal memory access #89054

Closed

Try to revert ARMEmitter.EmitMOV

35164cc

runfoapp bot mentioned this pull request Jan 12, 2024

Methodical_others test JIT/Methodical/Coverage/copy_prop_byref_to_native_int crashing #69832

Open

This was referenced Jan 12, 2024

pip fails to build wheels for cffi (gcc not found) in ubuntu.1804.armarch.open using image alpine-3.15-helix-arm32v7 dotnet/dnceng#1423

Open

CollectionsMarshal.AsSpan assertion failure in System.Text.Json tests #96876

Closed

filipnavara added 6 commits January 13, 2024 08:32

Convert IMAGE_REL_BASED_THUMB_MOV32_PCREL to ELF with the same offset…

f17709b

… as R2R

Unoptimal, but working, version of INLINE_GET_TLS_VAR for ARM32

f880ca6

Use PC-relative relocations for ARMEmitter.EmitMOV(dest, symbol)

ad0b3d2

Fat function pointers are not function symbols as far as ELF is conce…

c7b10be

…rned; the should not get the symbol size or the Thumb bit

Fix some bits and pieces of the ARM unwinding code

58d9f8c

Don't try to use ObjWriter package on unsupported platforms

0e6ff46

filipnavara marked this pull request as ready for review January 13, 2024 15:08

filipnavara requested a review from MichalStrehovsky as a code owner January 13, 2024 15:08

filipnavara commented Jan 13, 2024

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filipnavara removed the NO-REVIEW Experimental/testing PR, do NOT review it label Jan 13, 2024

build-analysis bot mentioned this pull request Jan 13, 2024

Test failure - System.NullReferenceException in System.Threading.Lock.TryInitializeStatics #94728

Closed

filipnavara commented Jan 13, 2024

View reviewed changes

src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/Dwarf/DwarfCie.cs Show resolved Hide resolved

filipnavara marked this pull request as draft January 13, 2024 17:05

filipnavara added 2 commits January 13, 2024 20:44

Generate valid ARM32 DWARF unwind info in JIT

fca6f2f

Handle negative offsets in CFI_REL_OFFSET conversion (unused at the m…

69e97ab

…oment)

filipnavara marked this pull request as ready for review January 13, 2024 19:51

Add linux-arm support to cross-compile targets

1908816

filipnavara commented Jan 14, 2024

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jkotas reviewed Jan 14, 2024

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src/coreclr/nativeaot/Runtime/unix/unixasmmacrosarm.inc Outdated Show resolved Hide resolved

Update src/coreclr/nativeaot/Runtime/unix/unixasmmacrosarm.inc

391f070

Co-authored-by: Jan Kotas <jkotas@microsoft.com>

MichalStrehovsky reviewed Jan 15, 2024

View reviewed changes

src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ObjectWriter.cs Outdated Show resolved Hide resolved

Update ObjectWriter.cs

54fa66c

Co-authored-by: Michal Strehovský <MichalStrehovsky@users.noreply.github.com>

build-analysis bot mentioned this pull request Jan 15, 2024

BasicEventSourceTests.TestsManifestGeneration.Test_EventSource_EtwManifestGeneration intermittent test failures #96904

Closed

Fix the order of register push in CFI unwind codes on ARM.

a7ec26a

filipnavara commented Jan 15, 2024

View reviewed changes

Make jit-format happy without making the code look ugly

78b9eee

build-analysis bot mentioned this pull request Jan 15, 2024

Assert failure: orObject->HasEmptySyncBlockInfo() #96790

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jkotas approved these changes Jan 16, 2024

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jkotas added the arch-arm32 label Jan 16, 2024

Merge branch 'main' into naot32

17ae730

jkotas mentioned this pull request Jan 17, 2024

BasicEventSourceTests.TestsManifestGeneration test failing in CI #97103

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jkotas merged commit 1a985d9 into dotnet:main Jan 17, 2024
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filipnavara deleted the naot32 branch January 17, 2024 14:43

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[NativeAOT] 32-bit platform ObjWriter and bit rot fixes #96890

[NativeAOT] 32-bit platform ObjWriter and bit rot fixes #96890

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jkotas commented Jan 16, 2024

		@@ -203,19 +197,20 @@ void Compiler::unwindBegPrologCFI()

		void Compiler::unwindPushPopMaskCFI(regMaskTP regMask, bool isFloat)

[NativeAOT] 32-bit platform ObjWriter and bit rot fixes #96890

[NativeAOT] 32-bit platform ObjWriter and bit rot fixes #96890

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