Intrinsify Interlocked.And and Interlocked.Or on XARCH

[EgorBo]

Closes #32239

These were only implemented on ARM64 (and RISC-V). Unlike other Interlocked APIs, these return original value so it makes them impossible to optimize on XARCH when that original value is used. Looks like all usages of it in BCL don't need return value so we can optimize this case. Example:

runtime/src/libraries/System.Private.CoreLib/src/System/Threading/Tasks/Task.cs

Line 756 in 0cf461b

Interlocked.And(ref m_stateFlags, ~(int)TaskStateFlags.WaitCompletionNotification);

void Test1(ref int x, int y) => Interlocked.Or(ref x, y); // return value is not used
int  Test2(ref int x, int y) => Interlocked.Or(ref x, y); // return value is used

Was:

; Method Tests:Test1(byref,int):this (FullOpts)
G_M7530_IG01:
       push     rax
G_M7530_IG02:
       mov      eax, dword ptr [rdx]
       jmp      SHORT G_M7530_IG03
       align    [0 bytes for IG03]
G_M7530_IG03:
       mov      ecx, eax
       or       ecx, r8d
       mov      dword ptr [rsp+0x04], eax
       lock     
       cmpxchg  dword ptr [rdx], ecx
       mov      ecx, dword ptr [rsp+0x04]
       cmp      eax, ecx
       je       SHORT G_M7530_IG05
G_M7530_IG04:
       mov      ecx, eax
       mov      eax, ecx
       jmp      SHORT G_M7530_IG03
G_M7530_IG05:
       add      rsp, 8
       ret      
; Total bytes of code: 37


; Method Tests:Test2(byref,int):int:this (FullOpts)
G_M30720_IG01:
       push     rax
G_M30720_IG02:
       mov      eax, dword ptr [rdx]
       jmp      SHORT G_M30720_IG03
       align    [0 bytes for IG03]
G_M30720_IG03:
       mov      ecx, eax
       or       ecx, r8d
       mov      dword ptr [rsp+0x04], eax
       lock     
       cmpxchg  dword ptr [rdx], ecx
       mov      ecx, dword ptr [rsp+0x04]
       cmp      eax, ecx
       je       SHORT G_M30720_IG05
G_M30720_IG04:
       mov      ecx, eax
       mov      eax, ecx
       jmp      SHORT G_M30720_IG03
G_M30720_IG05:
       mov      eax, ecx
G_M30720_IG06:
       add      rsp, 8
       ret      
; Total bytes of code: 39

Now:

; Method Tests:Test1(byref,int):this (FullOpts)
G_M7530_IG01:
G_M7530_IG02:
       lock     
       or       dword ptr [rdx], r8d
G_M7530_IG03:
       ret      
; Total bytes of code: 5


; Method Tests:Test2(byref,int):int:this (FullOpts)
G_M30720_IG01:
G_M30720_IG02:
       mov      eax, dword ptr [rdx]
G_M30720_IG03:
       mov      ecx, eax
       or       ecx, r8d
       lock     
       cmpxchg  dword ptr [rdx], ecx
       jne      SHORT G_M30720_IG03
G_M30720_IG04:
       ret      
; Total bytes of code: 14

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Issue Details

---

Closes #32239

These were only implemented on ARM64 (and RISC-V). Unlike other Interlocked APIs, these return original value so it makes them impossible to optimize on XARCH when that original value is used. Looks like all usages of it in BCL don't need return value so we can optimize this case.

void Test(ref int x, int y) => Interlocked.Or(ref x, y);

Was:

; Method Program:Test(byref,int):this (FullOpts)
G_M55114_IG01:  ;; offset=0x0000
       push     rax
						;; size=1 bbWeight=1 PerfScore 1.00

G_M55114_IG02:  ;; offset=0x0001
       mov      eax, dword ptr [rdx]
       jmp      SHORT G_M55114_IG03
       align    [0 bytes for IG03]
						;; size=4 bbWeight=1 PerfScore 4.00

G_M55114_IG03:  ;; offset=0x0005
       mov      ecx, eax
       or       ecx, r8d
       mov      dword ptr [rsp+0x04], eax
       lock     
       cmpxchg  dword ptr [rdx], ecx
       mov      ecx, dword ptr [rsp+0x04]
       cmp      eax, ecx
       je       SHORT G_M55114_IG05
						;; size=21 bbWeight=8 PerfScore 174.00

G_M55114_IG04:  ;; offset=0x001A
       mov      ecx, eax
       mov      eax, ecx
       jmp      SHORT G_M55114_IG03
						;; size=6 bbWeight=4 PerfScore 10.00

G_M55114_IG05:  ;; offset=0x0020
       add      rsp, 8
       ret      
						;; size=5 bbWeight=1 PerfScore 1.25
; Total bytes of code: 37

Now:

; Method Program:Test(byref,int):this (FullOpts)
G_M55114_IG01:  ;; offset=0x0000
						;; size=0 bbWeight=1 PerfScore 0.00

G_M55114_IG02:  ;; offset=0x0000
       lock     
       or       dword ptr [rdx], r8d
						;; size=4 bbWeight=1 PerfScore 16.00

G_M55114_IG03:  ;; offset=0x0004
       ret      
						;; size=1 bbWeight=1 PerfScore 1.00
; Total bytes of code: 5

Author:	EgorBo
Assignees:	EgorBo
Labels:	area-CodeGen-coreclr
Milestone:	-

[EgorBo]

@dotnet/jit-contrib @BruceForstall PTAL, simple PR, optimizes Interlocked.And/Add the way native compilers do: https://godbolt.org/z/csfd3nG89

Diffs

A few size and TP regressions for the cases when we previously didn't inline Interlocked.And/Or and now it's inlined as intrinsic in both Tier0 (non-debug and non-minopts) and Tier1

[kunalspathak]

Looks good, just a comment in lsra.