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ARM64: Use stlur for volatile stores #91553
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Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch Issue Detailsvolatile int x;
void Test() => x = 42; Was: ; Assembly listing for method Program:Test()
stp fp, lr, [sp, #-0x10]!
mov fp, sp
mov w1, #42
- dmb ish
- str w1, [x0, #0x08]
+ stlur w1, [x0, #0x08]
ldp fp, lr, [sp], #0x10
ret lr
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also, cc @VSadov |
Co-authored-by: Bruce Forstall <brucefo@microsoft.com>
Will this need a fix similar to #91668? |
I'd guess - yes? since it's the same ISA.
can you add them as well? |
Done (but untested) |
@BruceForstall PTAL refactored changes |
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LGTM. One question/suggestion.
Codegen diff on arm64 v8.4+ (e.g. Apple M2):