Implement GT_MUL_LONG for ARM64
#57926
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Tagging subscribers to this area: @JulieLeeMSFT Issue DetailsThis change refactors a bunch of logic so that it can be used on ARM64 to recognize and emit The changes, in order:
The diffs are quite good:
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SingleAccretion
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GT_MUL_LONG for arm64GT_MUL_LONG for ARM64
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This fixes #47490, right? |
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Yep, will link it once the CI is green. |
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cc @echesakovMSFT |
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Contributes to #35853 |
Move it to a GenTree method so that it can be reused in lowering. No diffs except for a couple (~5 across all SPMI collection) on ARM due to the new operand swapping behavior.
Move it out of the "#if !defined(TARGET_64BIT)" block. Also some miscellaneous moving of comments around.
Note: this commit breaks magic division.
To use the new GT_MUL_LONG support. Plus some tweaks to make it conform to the coding guide. Credit to @pentp for the substantive changes.
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The changes look good (with some comments).
@SingleAccretion Can you please share the diffs on Arm64?
Do the diffs in the PR's description suffice? |
Sorry, I meant an example of assembly diffs (not the summary). |
I see. There are two types of diffs with this change. The first is a straight removal of two casts, with a sutiable multiplication instruction change: - mov w0, w0
- mov w1, w1
- mul x22, x0, x1
+ umull x22, w0, w1
- sxtw x2, w3
- mov x3, #60
- mul x2, x2, x3
+ mov w2, #60
+ smull x2, w3, w2The second is the same, but with an added benefit of the multiplication being made non-overflowing: - mov w1, w2
- mov x0, #4
- umulh x5, x1, x0
- mul x1, x1, x0
- cmp x5, #0
- bne G_M31955_IG28
+ mov w1, #4
+ umull x1, w2, w1 // (ulong)w2 * (ulong)4 cannot overflow. |
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Great diffs! Thank you for the contribution @SingleAccretion!
cc @dotnet/jit-contrib
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Improvement on arm64: dotnet/perf-autofiling-issues#1817 |
ghost
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This change refactors a bunch of logic so that it can be used on ARM64 to recognize and emit
smull/umullmultiplies.The changes, in order:
Refactor the recognition logic so that it is idempotent. This commit is zero-diffs for 32 bit targets, as expected, except for a few small ones due to the new logic swapping operands before morphing to helper calls (and thus arguments to said helpers being assigned different registers).
Support for
GT_MUL_LONGin ARM64 codegen and LSRA. This commit breaks magic division because it deletes support for 32x32->64 multiplies fromgenCodeForBinary.Fixes for magic division, based on Fix ARM64 unsigned div by const perf regression #57372 plus some refactoring to make the code less
#ifdefy and conforming to the code guide. This commit makes the change a zero-diff one for ARM64.Finally, implement the recognition in lowering and associated refactoring, from which the bulk of the diffs come from.
Said diffs are quite nice:
win-arm64,linux-arm64.Fixes #47490.