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Put Crossgen2 in sync with #54235 #54438
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9ad2183
Put Crossgen2 in sync with #54235
trylek 5f684ca
Fine-tune the zero-size struct check
trylek 6c209bc
Remove the issues.targets entry for the LayoutClassTest this PR shoul…
trylek d7cfe53
Update CG2 unit tests to the modified type layout behavior
trylek 872f1e6
Fix bad merge
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Can
IsZeroSizedReferenceType
propety be deleted as well? It does not appear to be used anywhere after this change.There was a problem hiding this comment.
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I suspect we still need to do something about the zero-sized layout types because runtime artificially bumps up their size to 1 even though it rolls back the change when calculating the layout for a derived type. I guess that, as a first step, I need to see how the Pri1 tests look on the different architectures after my change. Other than that, I was under the impression that
IsZeroSizedReferenceType
was a pre-existing NativeAOT construct, not a Crossgen2-specific addition, but I may be mistaken about this.There was a problem hiding this comment.
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IsZeroSizedReferenceType was added in #46769
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Thanks for sharing the link to the original PR. ARM tests are already failing in the Pri1 tests exactly because of the missing zero-sized layout compensation, I believe the trick is not about removing the check but figuring out the proper place for it, that's my next step.