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[Arm64] Use SIMD register to zero init frame #46609

Merged
merged 14 commits into from
Jan 26, 2021
Merged

[Arm64] Use SIMD register to zero init frame #46609

merged 14 commits into from
Jan 26, 2021

Commits on Jan 26, 2021

  1. Refactor CodeGen::genZeroInitFrame in src/coreclr/jit/codegencommon.cpp

    @echesakov
    echesakov committed Jan 26, 2021
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  2. Use stp q9, q9, <addr-reg> for zeroing a frame in CodeGen::genZeroIni… 

    …tFrame in src/coreclr/jit/codegencommon.cpp
    @echesakov
    echesakov committed Jan 26, 2021
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  3. Fix comment for CodeGen::genInstrWithConstant in src/coreclr/jit/code… 

    …genarm64.cpp
    @echesakov
    echesakov committed Jan 26, 2021
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  4. Leave the TARGET_ARM implementation of CodeGen::genZeroInitFrame asid… 

    …e in src/coreclr/jit/codegencommon.cpp
    @echesakov
    echesakov committed Jan 26, 2021
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  5. Format comment in CodeGen::genZeroInitFrame in src/coreclr/jit/codege… 

    …ncommon.cpp
    @echesakov
    echesakov committed Jan 26, 2021
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  6. Re-implement CodeGen::genZeroInitFrame() in src/coreclr/jit/codegenco… 

    …mmon.cpp src/coreclr/jit/target.h
    @echesakov
    echesakov committed Jan 26, 2021
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  7. Implement GetDataCacheZeroIDReg() helper and use it to set Instructio… 

    …nSet_Dczva flag in src/coreclr/vm/arm64/asmhelpers.S src/coreclr/vm/arm64/asmhelpers.asm src/coreclr/vm/codeman.cpp
    @echesakov
    echesakov committed Jan 26, 2021
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  8. Add InstructionSet_Dczva in src/coreclr/inc/corinfoinstructionset.h s… 

    …rc/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSetHelper.cs src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt
    @echesakov
    echesakov committed Jan 26, 2021
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  9. Implement DC ZVA instruction in coreclr/jit/emitarm64.cpp src/coreclr… 

    …/jit/emitfmtsarm64.h src/coreclr/jit/instrsarm64.h
    @echesakov
    echesakov committed Jan 26, 2021
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  10. Allow second operand of BFM instruction to be XZR or WZR in src/corec… 

    …lr/jit/emitarm64.cpp
    @echesakov
    echesakov committed Jan 26, 2021
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  11. Use DC ZVA for regions >= 320 bytes in src/coreclr/jit/codegencommon.… 

    …cpp src/coreclr/jit/target.h
    @echesakov
    echesakov committed Jan 26, 2021
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  12. Use DC ZVA for memory regions >= 256 bytes in src/coreclr/jit/codegen… 

    …common.cpp
    @echesakov
    echesakov committed Jan 26, 2021
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  13. Update comment in CodeGen::genZeroInitFrame in src/coreclr/jit/codege… 

    …ncommon.cpp
    @echesakov
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  14. Update JIT/EE interface GUID in jiteeversionguid.h

    @echesakov
    echesakov committed Jan 26, 2021
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