Synology ARMv7 (Alpine AL-314 & Marvell Armada XP MV78230) Illegal instruction

[publicarray]

Description

We have several applications that work fine on x64 and ARM64 Synology Devices, but we have reports that they fail to run on some ARMv7 processors: SynoCommunity/spksrc#4546 and publicarray/spksrc#28

with Illegal instruction (core dumped)

Reproducing the problem is difficult as I don't have an ARMv7 processor to hand. The only thing I have is a DSM environment where I can't reproduce the problem.

So the natural question is What are the ARMv7 processor feature requirements? And the specific versions of supported libs .e.g. (glib/libstdc++)? (we already ship the software with an updated libstdc++)

Configuration

• Which version of .NET is the code running on? 5.0.8
• What OS and version, and what distro if applicable? Linux - Synology DSM
• What is the architecture (x64, x86, ARM, ARM64)? ARM
• Do you know whether it is specific to that configuration? Probably
• If you're using Blazor, which web browser(s) do you see this issue in? No

Other information

processor       : 0
model name      : ARMv7 Processor rev 4 (v7l)
Speed           : 1.4GHz
Features        : swp half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt 
CPU implementer : 0x41
CPU architecture: 7
CPU variant     : 0x2
CPU part        : 0xc0f
CPU revision    : 4

Processor	: Marvell PJ4Bv7 Processor rev 2 (v7l)
processor	: 0
BogoMIPS	: 1332.01

processor	: 1
BogoMIPS	: 1332.01

Features	: swp half thumb fastmult vfp edsp vfpv3 tls 
CPU implementer	: 0x56
CPU architecture: 7
CPU variant	: 0x2
CPU part	: 0x584
CPU revision	: 2

Hardware	: Marvell Armada XP Development Board
Revision	: 0000
Serial		: 0000000000000000

CC/ Radarr: @ta264 Jellyfin: @anthonylavado

If I've overlooked something simple I'm sorry for notifying people. But I think that this problem requires collaboration.

[dotnet-issue-labeler]

I couldn't figure out the best area label to add to this issue. If you have write-permissions please help me learn by adding exactly one area label.

[mangod9]

is it possible to share a dump when a failure occurs?

[ta264]

Something I found a while ago:
The default arm compilation configuration for CoreCLR is armv7-a with thumb-2 instruction set and VFPv3 floating point with 32 64-bit FPU registers.

https://github.com/dotnet/runtime/blob/main/docs/workflow/building/coreclr/cross-building.md#cross-compiling-coreclr-for-other-vfp-configurations

[publicarray]

Thanks I've asked if @rfrmarco is able to provide one.

Thanks @ta264, So the CPUs should work...

[stinker1978]

Running into what I believe is the same issue. DS715+ and latest Radarr upgrade won't start. I am not sure if the CPU on the DS715+ is supported or not, so can you let me know?

`processor : 0
model name : ARMv7 Processor rev 4 (v7l)
Speed : 1.4GHz
Features : swp half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x2
CPU part : 0xc0f
CPU revision : 4

processor : 1
model name : ARMv7 Processor rev 4 (v7l)
Speed : 1.4GHz
Features : swp half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x2
CPU part : 0xc0f
CPU revision : 4

processor : 2
model name : ARMv7 Processor rev 4 (v7l)
Speed : 1.4GHz
Features : swp half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x2
CPU part : 0xc0f
CPU revision : 4

processor : 3
model name : ARMv7 Processor rev 4 (v7l)
Speed : 1.4GHz
Features : swp half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x2
CPU part : 0xc0f
CPU revision : 4

Hardware : AnnapurnaLabs Alpine (Device Tree)
Revision : 0000
Serial : 0000000000000000
processor : 0
model name : ARMv7 Processor rev 4 (v7l)
Speed : 1.4GHz
Features : swp half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x2
CPU part : 0xc0f
CPU revision : 4

processor : 1
model name : ARMv7 Processor rev 4 (v7l)
Speed : 1.4GHz
Features : swp half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x2
CPU part : 0xc0f
CPU revision : 4

processor : 2
model name : ARMv7 Processor rev 4 (v7l)
Speed : 1.4GHz
Features : swp half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x2
CPU part : 0xc0f
CPU revision : 4

processor : 3
model name : ARMv7 Processor rev 4 (v7l)
Speed : 1.4GHz
Features : swp half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x2
CPU part : 0xc0f
CPU revision : 4

Hardware : AnnapurnaLabs Alpine (Device Tree)
Revision : 0000
Serial : 0000000000000000`

[publicarray]

DS715+ doesn't exist you probably mean DS715. Sorry but your CPU Annapurna Labs Alpine AL-314 is the one having this issue, so I've marked it as unsupported for the Radarr package for now. If you want you can add 👍 to this issue if you want to give it more attention for the devs here. I've done all I can.

[stinker1978]

DS715+ doesn't exist you probably mean DS715. Sorry but your CPU Annapurna Labs Alpine AL-314 is the one having this issue, so I've marked it as unsupported for the Radarr package for now. If you want you can add 👍 to this issue if you want to give it more attention for the devs here. I've done all I can.

You are correct, it's the DS715.

How do I add a 👍 ? Also, if there is anything I can do to help gather more info and such to better diagnose the issue, let me know!

[publicarray]

I just received a report that the DS2015xs, Annapurna Labs Alpine AL-514 is having the same issue with radarr

[ta264]

@stinker1978 Please can you come by the radarr discord? https://radarr.video/discord I may have a solution.