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[JIT] [Issue: 61620] Optimizing ARM64 for *x = dblCns; (#61847)
* [Issue: 61620] Optimizing ARM64 for *x = 0; * Update src/coreclr/jit/lower.cpp Co-authored-by: SingleAccretion <62474226+SingleAccretion@users.noreply.github.com> * Fixed bug with * x = dConst if dConst is not 0 * remove extra printf * Replacing IsFPZero with IsCnsNonZeroFltOrDbl for STOREIND Minor edits with conditional compilation in lower.cpp * fixed ARM codegen for STOREIND * Update src/coreclr/jit/lower.cpp Co-authored-by: SingleAccretion <62474226+SingleAccretion@users.noreply.github.com> * Update src/coreclr/jit/lower.cpp Co-authored-by: SingleAccretion <62474226+SingleAccretion@users.noreply.github.com> * fix formatting Co-authored-by: SingleAccretion <62474226+SingleAccretion@users.noreply.github.com>
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