[linux-6.6.y] Support for MIPS-based Loongson Devices #528
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…e human-readable In /proc/cpuinfo, we keep "cpu model" as is, since GCC should use it for -march=native. Besides, we add __cpu_full_name[] to describe the processor in a more human-readable manner. The full name is displayed as "model name" in cpuinfo, which is needed by some userspace tools such as "lscpu" and "gnome-system-monitor". The CPU frequency in "model name" is the default value (highest), and there is also a "CPU MHz" whose value can be changed by cpufreq. This is only used by Loongson now (ICT is dropped in cpu name, and cpu name can be overwritten by BIOS). Why drop ICT? At the beginning, Loongson is designed by ICT, but now all Loongson processors is designed by "Loongson Technology Corporation Limited" which is independent from ICT. We have search the code in https://codesearch.debian.net/, and the result is: 1, GCC searches the "cpu model" in cpuinfo, but it only matches "Loongson-2 V0.2" and so on, so drop "ICT" is comfortable; 2, Debian Installer searches the "cpu model" in cpuinfo and matches "ICT Loongson", but Yunqiang Su is modifying the code; 3, Valgrind searches the "cpu model" in cpuinfo and matches "ICT Loongson", and we are planning to fix it up. Signed-off-by: Huacai Chen <chenhc@lemote.com> Link: https://lore.kernel.org/all/1584006053-28887-1-git-send-email-chenhc@lemote.com/ [Kexy: Resolved minor conflicts in arch/mips/kernel/cpu-probe.c, arch/mips/loongson64/env.c, and arch/mips/loongson64/smp.c] Signed-off-by: Kexy Biscuit <kexybiscuit@aosc.io>
…d is modifying
When user-space program accessing a virtual address and falls into TLB invalid
exception handling. at almost the same time, if the pmd which that contains this
virtual address is hit by THP scanning, and then a invalid address access may
occurs in the tlb handler:
CPU 0: (userspace) | CPU 1: (khugepaged)
1: | scan hit: set pmde to invalid_pmd_table
| (by pmd_clear)
2: handle_tlbl(tlb invalid): |
load pmde for huge page testing, |
pmde doesn't contains _PAGE_HUGE |
bit |
3: | collapsed: set pmde to huge page format
4: handle_tlbl(normal page case): |
load pmde again as base address, |
pmde doesn't contains an address, |
access invalid address |
This patch avoids the inconsistency of two memory loads by reusing the result
of one load.
Signed-off-by: wangrui <wangrui@loongson.cn>
Link: https://lore.kernel.org/all/20210212082058.40792-1-wangrui@loongson.cn/
Link: https://lore.kernel.org/all/CAAhV-H5a6f7SSaMfOJudFuqtzLqkDks_NkjsPe15gN3mJTGBDw@mail.gmail.com/
[Kexy: Resolved minor conflict in arch/mips/mm/tlbex.c]
Signed-off-by: Kexy Biscuit <kexybiscuit@aosc.io>
The EBase registers of old Loongson processor models before 3A2000 are 32bit and have no WG bit; those of newer models are 64bit and do have the WG bit. Unfortunately, dynamically allocated EBase addresses do not work well for the Loongson platform, because Loongson's memory layout is very limited below 0x20000000. The dynamically allocated EBase address above 0x20000000 is thus unmappable to a KSEG0/KSEG1 virtual address, but the cache error handler MUST be in KSEG1 (please see set_uncached_handler() in traps.c). Some might suggest that the cache error handler is hardly used so this is not a problem, but Loongson's MMIO configuration registers might be corrupted by set_uncached_handler(). To make Linux kernel on Loongson more robust, a board_ebase_setup() hook is added to ensure CKSEG0 is always used for EBase. This is also useful for configurations where firmware-provided EBase is not sane. Maybe this problem is present for all MIPSr2 processors, but it seems not all platforms have memory at physical address 0. So this patch only touches Loongson. Signed-off-by: Huacai Chen <chenhc@lemote.com> Link: https://lore.kernel.org/all/1584006117-28985-1-git-send-email-chenhc@lemote.com/ Signed-off-by: Kexy Biscuit <kexybiscuit@aosc.io>
In commit bc73905 ("[SCSI] lpfc 8.3.16: SLI Additions, updates, and code cleanup"), lpfc_memcpy_to_slim() have switched memcpy_toio() to __write32_copy() in order to prevent unaligned 64 bit copy. Recently, we found that lpfc_memcpy_from_slim() have similar issues, so let it switch memcpy_fromio() to __read32_copy(). As maintainer says, it seems that we can hardly see a real "unaligned 64 bit copy", but this patch is still useful. Because in our tests we found that lpfc doesn't support 128 bit access, but some optimized memcpy() use 128 bit access (at lease on Loongson). Cc: stable@vger.kernel.org Signed-off-by: Huacai Chen <chenhc@lemote.com> Link: https://lore.kernel.org/all/1545208274-13736-1-git-send-email-chenhc@lemote.com/ Signed-off-by: Kexy Biscuit <kexybiscuit@aosc.io>
Kexec-tools use mem=X@Y to pass usable memories to crash kernel, but in commit a94e4f2 ("MIPS: init: Drop boot_mem_map") all BIOS passed memories are removed by early_parse_mem(). I think this is reasonable for a normal kernel but not for a crash kernel, because a crash kernel should be able to see all old memories, even though it is not supposed to use them. Fixes: a94e4f2 ("MIPS: init: Drop boot_mem_map") Signed-off-by: Huacai Chen <chenhc@lemote.com> Link: https://lore.kernel.org/all/1600942079-18652-1-git-send-email-chenhc@lemote.com/ Signed-off-by: Kexy Biscuit <kexybiscuit@aosc.io>
Traditionally, MIPS's contiguous low memory can be as less as 256M, so crashkernel=X@Y may be unable to large enough in some cases. Moreover, for the "multi numa node + sparse memory model" case, it is attempt to allocate section_mem_maps on every node. Thus, if the total memory of a node is more than 1GB, we reserve the top 128MB for the crash kernel. Signed-off-by: Huacai Chen <chenhc@lemote.com> Link: https://lore.kernel.org/all/1600942079-18652-2-git-send-email-chenhc@lemote.com/ [Kexy: Resolved minor conflict in arch/mips/kernel/setup.c] Signed-off-by: Kexy Biscuit <kexybiscuit@aosc.io>
this is the first cut of the MIPS auditing patches. MIPS doesn't quite
fit into the existing pattern of other architectures and I'd appreciate
your comments and maybe even an Acked-by.
- MIPS syscalls return a success / error flag in register $7. If the
flag is set then the return value in $2 is a *positive* error value.
This means the existing AUDITSC_RESULT() macro does not work on
MIPS and thus ptrace.c defines it's own version MIPS_AUDITSC_RESULT().
- Linux on MIPS extends the traditional syscall table used by older UNIX
implementations. This is why 32-bit Linux syscalls are starting from
4000; the native 64-bit syscalls start from 5000 and the N32 compat ABI
from 6000. The existing syscall bitmap is only large enough for at most
2048 syscalls, so I had to increase AUDIT_BITMASK_SIZE to 256 which
provides enough space for 8192 syscalls. Because include/linux/audit.h
and AUDIT_BITMASK_SIZE are exported to userspace I've used an #ifdef
__mips__ for this.
- I've introduced a flag __AUDIT_ARCH_ALT to indicate an alternative ABI.
The name of the flag is intentionally very generic to make the name
hopefully fit other architectures' eventual need as well. On MIPS it
indicates the 3rd ABI known as N32.
- To make matters worse, most MIPS processors can be configured to be
big or little endian. Traditionally the the 64-bit little endian
configuration is named mips64el, so I've changed references to MIPSEL64
in audit.h to MIPS64EL.
- The code treats the little endian MIPS architecture as separate from
big endian. Combined with the 3 ABIs that's 6 combinations. I tried
to sort of follow the example set by ARM which explicitly lists the
(rare) big endian architecture variant - but it doesn't seem to very
useful so I wonder if this could be squashed to just the three ABIs
without consideration of endianess?
- Talking about flags; I've defined the the N32 architecture flags were defined
#define AUDIT_ARCH_MIPS64_N32 (EM_MIPS|__AUDIT_ARCH_ALT)
#define AUDIT_ARCH_MIPS64EL_N32 (EM_MIPS|__AUDIT_ARCH_ALT|__AUDIT_ARCH_LE
N32 is a 32-bit ABI but one that only runs on 64-bit processors as it
uses 64-bit registers for 64-bit integers. So I'm uncertain if the
__AUDIT_ARCH_64BIT flags should be set or not.
Thanks in advance,
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[Huacai: The original patch is from Ralf. I have maintained it for more
than six years on Loongson platform, and it works perfectly. Most of
the commit messages are written by Ralf.]
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Link: https://lore.kernel.org/all/1396433596-612624-2-git-send-email-manuel.lauss@gmail.com/
Fixes: 7a01772 ("audit: Add CONFIG_HAVE_ARCH_AUDITSYSCALL")
Fixes: f2d0801 ("MIPS: Add new AUDIT_ARCH token for the N32 ABI on MIPS64")
Fixes: d1e63c9 ("MIPS: Factor o32 specific code into signal_o32.c")
Link: https://lore.kernel.org/all/1584006083-28936-1-git-send-email-chenhc@lemote.com/
[Kexy: Resolved minor conflicts in arch/mips/Kconfig,
arch/mips/include/asm/abi.h, arch/mips/include/uapi/asm/unistd.h,
arch/mips/kernel/ptrace.c, arch/mips/kernel/signal.c,
arch/mips/kernel/signal32.c, arch/mips/kernel/signal_n32.c,
include/uapi/linux/audit.h, and init/Kconfig.
In 7a01772 ("audit: Add CONFIG_HAVE_ARCH_AUDITSYSCALL"), a new
config option declaring audit syscall was added, so make MIPS in
arch/mips/Kconfig to select it.
It looks that CONFIG_AUDIT_ARCH is never used, removing the option.
In
f2d0801 ("MIPS: Add new AUDIT_ARCH token for the N32 ABI on MIPS64"),
tokens for the N32 ABI on MIPS64 were added, so all related changes are
not included or changed accordingly.
In d1e63c9 ("MIPS: Factor o32 specific code into signal_o32.c"),
struct mips_abi_32 was moved from arch/mips/kernel/signal32.c to
arch/mips/kernel/signal_o32.c, so related changes are also moved.
Incorporated Huacai's changes to arch/mips/kernel/audit-native.c, and
kernel/auditsc.c.]
Signed-off-by: Kexy Biscuit <kexybiscuit@aosc.io>
…ngson-3 Add madd.s/madd.d/msub.s/msub.d/nmadd.s/nmadd.d/nmsub.s/nmsub.d emulation for Loongson-3. MIPS R2 suggest these instructions be unfused, but Loongson-3 suggest these instructions be fused, which is similar to maddf/msubf in MIPS R6. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Pei Huang <huangpei@loongson.cn> Link: https://lore.kernel.org/all/1549454594-9056-1-git-send-email-chenhc@lemote.com/ Signed-off-by: Kexy Biscuit <kexybiscuit@aosc.io>
NUMA balancing is available on nearly all architectures, but MIPS lacks it for a long time. In theory, the current NUMA balancing framework only need a "PROTNONE" page table bit and some APIs to manipulate it. So, it is time for us to add MIPS's NUMA balancing support (Only for 64bit now because NUMA balancing depends on huge page implicitly). Signed-off-by: Huacai Chen <chenhc@lemote.com> Link: https://lore.kernel.org/all/1604201638-4001-1-git-send-email-chenhc@lemote.com/ [Kexy: Resolved minor conflicts in arch/mips/Kconfig, and arch/mips/include/asm/pgtable.h.] Signed-off-by: Kexy Biscuit <kexybiscuit@aosc.io>
NUMA node distances affect the NUMA balancing behaviors. The cost of cross-package memory access is very high, and our benchmarks show that 200 is a more appropriate value than 100 (for cross-package numa node distance) on Loongson64 platforms, so enlarge it. Signed-off-by: Huacai Chen <chenhc@lemote.com> Link: https://lore.kernel.org/all/1604201638-4001-3-git-send-email-chenhc@lemote.com/ Signed-off-by: Kexy Biscuit <kexybiscuit@aosc.io>
…tions When compiling this driver for platforms with partial clk support (i.e. MIPS/Loongson64), it will report missing symbol for clk_get_sys. Conditioning interface type getters will help compiler to eliminate unsed code and thus exclude calls to clk symbols. Also hopefully reduce code size on other platforms. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Mingcong Bai <jeffbai@aosc.io> Signed-off-by: Kexy Biscuit <kexybiscuit@aosc.io>
After commit b3b5764 ("tty: serial_core: convert uart_open to use tty_port_open") and 761ed4a ("tty: serial_core: convert uart_close to use tty_port_close"), TTY_IO_ERROR is set by tty_port_close() unconditionally, but cleared by tty_port_open() only when tty_port_initialized() return 0. This is a bug: If we use "console=ttyS*" in kernel parameters, the corresponding serial port's port->console will be true. When somebody close the serial port, tty_port_close() will return without calling tty_port_set_initialized(port, 0). Then, when it is opened again, tty_port_open() will not clear TTY_IO_ERROR, and serial port becomes unavailable at last. So, this patch clear TTY_IO_ERROR in uart_open() if tty_port_open() return 0. Signed-off-by: Ce Sun <sunc@lemote.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Kexy Biscuit <kexybiscuit@aosc.io>
Partially implemented by commit 8267e78 ("MIPS: Tidy up CP0.Config6 bits definition"). [Mingcong Bai: Resolved merge conflicts in the following... arch/mips/include/asm/clocksource.h arch/mips/include/asm/cpu-features.h arch/mips/include/asm/cpu.h arch/mips/include/asm/mach-loongson64/loongson_regs.h arch/mips/include/asm/mipsregs.h arch/mips/include/asm/vdso/gettimeofday.h arch/mips/kernel/cpu-probe.c arch/mips/loongson64/constant_timer.c arch/mips/loongson64/loongson-3/Makefile => arch/mips/loongson64/Makefile arch/mips/loongson64/smp.c] Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Mingcong Bai <jeffbai@aosc.io> Signed-off-by: Kexy Biscuit <kexybiscuit@aosc.io>
… >= v5.7-rc2 With commit 07d8350 ("genirq: Remove setup_irq() and remove_irq()"), setup_irq() was removed in favour of request_irq(). This was done following commit cc2550b ("clocksource: Replace setup_irq() by request_irq()") (v5.7-rc1). Follow the latter commit as a model to revise loongson64's constant_timer and use request_irq() instead. Also add error handling and output for cases of failure. Signed-off-by: Mingcong Bai <jeffbai@aosc.io> Signed-off-by: Kexy Biscuit <kexybiscuit@aosc.io>
…stant_timer Follow commit e1bdb22 ("mips: vdso: Use generic VDSO clock mode storage") (v5.7-rc1) and revise vdso_clock_mode setting in constant_timer code for loongson64 platforms. Signed-off-by: Mingcong Bai <jeffbai@aosc.io> Signed-off-by: Kexy Biscuit <kexybiscuit@aosc.io>
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| /* | ||
| * The following registers are determined by the EC index configureation. | ||
| * 1. fill the PORT_INDEX as EC register. | ||
| * 2. fill the PORT_DATA as EC register write data or get the data from it. |
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| * Allow physical addresses to be fixed up to help peripherals located | ||
| * outside the low 32-bit range -- generic pass-through version. | ||
| */ | ||
| static inline phys_addr_t fixup_bigphys_addr(phys_addr_t phys_addr, phys_addr_t size) |
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| @@ -36,7 +36,7 @@ struct temp_range { | |||
| struct loongson_fan_policy { | |||
| u8 type; | |||
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| /* percent only used when type is CONSTANT_SPEED_POLICY */ | |||
| /* CONSTANT_SPEED_POLICY: actual perenct, STEP_SPEED_POLICY: maximum percent */ | |||
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| @@ -131,6 +131,9 @@ static inline u32 read_cpucfg(u32 reg) | |||
| #define LOONGSON_CFG7_GCCAEQRP BIT(0) | |||
| #define LOONGSON_CFG7_UCAWINP BIT(1) | |||
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| #define CSR_TO_RAW_ADDR(cpu, csr) ((0x900000003ff00000 | csr | \ | |||
| (((u64)cpu & 0xc) << 42)) | (((u64)cpu & 0x3) << 8)) | |||
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| static inline bool cpu_has_csr(void) | |||
| { | |||
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| @@ -131,6 +131,9 @@ static inline u32 read_cpucfg(u32 reg) | |||
| #define LOONGSON_CFG7_GCCAEQRP BIT(0) | |||
| #define LOONGSON_CFG7_UCAWINP BIT(1) | |||
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| #define CSR_TO_RAW_ADDR(cpu, csr) ((0x900000003ff00000 | csr | \ | |||
| (((u64)cpu & 0xc) << 42)) | (((u64)cpu & 0x3) << 8)) | |||
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| static inline bool cpu_has_csr(void) | |||
| { | |||
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| @@ -131,6 +131,9 @@ static inline u32 read_cpucfg(u32 reg) | |||
| #define LOONGSON_CFG7_GCCAEQRP BIT(0) | |||
| #define LOONGSON_CFG7_UCAWINP BIT(1) | |||
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| #define CSR_TO_RAW_ADDR(cpu, csr) ((0x900000003ff00000 | csr | \ | |||
| (((u64)cpu & 0xc) << 42)) | (((u64)cpu & 0x3) << 8)) | |||
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| static inline bool cpu_has_csr(void) | |||
| { | |||
| if (cpu_has_cfg()) | |||
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| #define CMD_GET_ENABLED_FEATURES 0x3 | ||
| /* Get currently enabled features, input index, output feature flags */ | ||
| #define CMD_SET_ENABLED_FEATURES 0x4 | ||
| /* Set features enabled state, input index and flags, output sucessfully enabled flags */ |
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| @@ -27,6 +27,8 @@ struct vm_area_struct; | |||
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| #define PAGE_SHARED vm_get_page_prot(VM_READ|VM_WRITE|VM_SHARED) | |||
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| #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_NO_READ | \ | |||
| _page_cachable_default) | |||
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| @@ -42,6 +42,10 @@ void uasm_i##op(u32 **buf, unsigned int a, signed int b, unsigned int c) | |||
| #define Ip_s3s1s2(op) \ | |||
| void uasm_i##op(u32 **buf, int a, int b, int c) | |||
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| #define Ip_u4u2u1s3(op) \ | |||
| void uasm_i##op(u32 **buf, unsigned int a, unsigned int b, signed int c, \ | |||
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| @@ -42,6 +42,10 @@ void uasm_i##op(u32 **buf, unsigned int a, signed int b, unsigned int c) | |||
| #define Ip_s3s1s2(op) \ | |||
| void uasm_i##op(u32 **buf, int a, int b, int c) | |||
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| #define Ip_u4u2u1s3(op) \ | |||
| void uasm_i##op(u32 **buf, unsigned int a, unsigned int b, signed int c, \ | |||
| unsigned int d) | |||
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| @@ -42,6 +42,10 @@ void uasm_i##op(u32 **buf, unsigned int a, signed int b, unsigned int c) | |||
| #define Ip_s3s1s2(op) \ | |||
| void uasm_i##op(u32 **buf, int a, int b, int c) | |||
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| #define Ip_u4u2u1s3(op) \ | |||
| void uasm_i##op(u32 **buf, unsigned int a, unsigned int b, signed int c, \ | |||
| unsigned int d) | |||
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| * Allow physical addresses to be fixed up to help peripherals located | ||
| * outside the low 32-bit range -- generic pass-through version. | ||
| */ | ||
| static inline phys_addr_t fixup_bigphys_addr(phys_addr_t phys_addr, phys_addr_t size) |
There was a problem hiding this comment.
WARNING: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
| @@ -36,7 +36,7 @@ struct temp_range { | |||
| struct loongson_fan_policy { | |||
| u8 type; | |||
|
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| /* percent only used when type is CONSTANT_SPEED_POLICY */ | |||
| /* CONSTANT_SPEED_POLICY: actual perenct, STEP_SPEED_POLICY: maximum percent */ | |||
There was a problem hiding this comment.
WARNING: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
| @@ -131,6 +131,9 @@ static inline u32 read_cpucfg(u32 reg) | |||
| #define LOONGSON_CFG7_GCCAEQRP BIT(0) | |||
| #define LOONGSON_CFG7_UCAWINP BIT(1) | |||
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| #define CSR_TO_RAW_ADDR(cpu, csr) ((0x900000003ff00000 | csr | \ | |||
| (((u64)cpu & 0xc) << 42)) | (((u64)cpu & 0x3) << 8)) | |||
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| static inline bool cpu_has_csr(void) | |||
| { | |||
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| @@ -131,6 +131,9 @@ static inline u32 read_cpucfg(u32 reg) | |||
| #define LOONGSON_CFG7_GCCAEQRP BIT(0) | |||
| #define LOONGSON_CFG7_UCAWINP BIT(1) | |||
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| #define CSR_TO_RAW_ADDR(cpu, csr) ((0x900000003ff00000 | csr | \ | |||
| (((u64)cpu & 0xc) << 42)) | (((u64)cpu & 0x3) << 8)) | |||
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| static inline bool cpu_has_csr(void) | |||
| { | |||
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ERROR: patch seems to be corrupt (line wrapped?)
| @@ -131,6 +131,9 @@ static inline u32 read_cpucfg(u32 reg) | |||
| #define LOONGSON_CFG7_GCCAEQRP BIT(0) | |||
| #define LOONGSON_CFG7_UCAWINP BIT(1) | |||
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| #define CSR_TO_RAW_ADDR(cpu, csr) ((0x900000003ff00000 | csr | \ | |||
| (((u64)cpu & 0xc) << 42)) | (((u64)cpu & 0x3) << 8)) | |||
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| static inline bool cpu_has_csr(void) | |||
| { | |||
| if (cpu_has_cfg()) | |||
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WARNING: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
| #define CMD_GET_ENABLED_FEATURES 0x3 | ||
| /* Get currently enabled features, input index, output feature flags */ | ||
| #define CMD_SET_ENABLED_FEATURES 0x4 | ||
| /* Set features enabled state, input index and flags, output sucessfully enabled flags */ |
There was a problem hiding this comment.
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| @@ -27,6 +27,8 @@ struct vm_area_struct; | |||
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| #define PAGE_SHARED vm_get_page_prot(VM_READ|VM_WRITE|VM_SHARED) | |||
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| #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_NO_READ | \ | |||
| _page_cachable_default) | |||
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WARNING: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
| @@ -42,6 +42,10 @@ void uasm_i##op(u32 **buf, unsigned int a, signed int b, unsigned int c) | |||
| #define Ip_s3s1s2(op) \ | |||
| void uasm_i##op(u32 **buf, int a, int b, int c) | |||
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| #define Ip_u4u2u1s3(op) \ | |||
| void uasm_i##op(u32 **buf, unsigned int a, unsigned int b, signed int c, \ | |||
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WARNING: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
| @@ -42,6 +42,10 @@ void uasm_i##op(u32 **buf, unsigned int a, signed int b, unsigned int c) | |||
| #define Ip_s3s1s2(op) \ | |||
| void uasm_i##op(u32 **buf, int a, int b, int c) | |||
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| #define Ip_u4u2u1s3(op) \ | |||
| void uasm_i##op(u32 **buf, unsigned int a, unsigned int b, signed int c, \ | |||
| unsigned int d) | |||
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ERROR: Avoid using diff content in the commit message - patch(1) might not work
| @@ -42,6 +42,10 @@ void uasm_i##op(u32 **buf, unsigned int a, signed int b, unsigned int c) | |||
| #define Ip_s3s1s2(op) \ | |||
| void uasm_i##op(u32 **buf, int a, int b, int c) | |||
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| #define Ip_u4u2u1s3(op) \ | |||
| void uasm_i##op(u32 **buf, unsigned int a, unsigned int b, signed int c, \ | |||
| unsigned int d) | |||
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ERROR: patch seems to be corrupt (line wrapped?)
| @@ -15,25 +15,31 @@ | |||
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| #include <asm/sgidefs.h> | |||
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| #if _MIPS_SIM == _MIPS_SIM_ABI32 | |||
| #if (defined(__WANT_SYSCALL_NUMBERS) && \ | |||
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WARNING: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
arch/mips/loongson64/env.c
Outdated
| pr_info("CpuClock = %u\n", cpu_clock_freq); | ||
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| /* Append default cpu frequency with round-off */ | ||
| sprintf(freq, " @ %uMHz", (cpu_clock_freq + 500000) / 1000000); | ||
| strncat(cpu_full_name, freq, sizeof(cpu_full_name)); |
There was a problem hiding this comment.
clang-19存在如下报错：
arch/mips/loongson64/env.c:190:31: error: the value of the size argument in 'strncat' is too large, might lead to a buffer overflow [-Werror,-Wstrncat-size]
190 | strncat(cpu_full_name, freq, sizeof(cpu_full_name));
| ^~~~~~~~~~~~~~~~~~~~~
arch/mips/loongson64/env.c:190:31: note: change the argument to be the free space in the destination buffer minus the terminating null byte
190 | strncat(cpu_full_name, freq, sizeof(cpu_full_name));
| ^~~~~~~~~~~~~~~~~~~~~
| sizeof(cpu_full_name) - strlen(cpu_full_name) - 1
1 error generated.
可改为：
strncat(cpu_full_name, freq, sizeof(cpu_full_name) - strlen(cpu_full_name) - 1);
|
从逻辑上来看 应该修改为
strncat(cpu_full_name, freq, strlen(freq));
…---Original---
From: ***@***.***>
Date: Tue, Dec 24, 2024 14:46 PM
To: ***@***.***>;
Cc: ***@***.******@***.***>;
Subject: Re: [deepin-community/kernel] [linux-6.6.y] Support for MIPS-basedLoongson Devices (PR #528)
@Avenger-285714 commented on this pull request.
In arch/mips/loongson64/env.c:
> pr_info("CpuClock = %u\n", cpu_clock_freq); + /* Append default cpu frequency with round-off */ + sprintf(freq, " @ %uMHz", (cpu_clock_freq + 500000) / 1000000); + strncat(cpu_full_name, freq, sizeof(cpu_full_name));
clang-19存在如下报错：
arch/mips/loongson64/env.c:190:31: error: the value of the size argument in 'strncat' is too large, might lead to a buffer overflow [-Werror,-Wstrncat-size]
190 | strncat(cpu_full_name, freq, sizeof(cpu_full_name));
| ^~~~~~~~~~~~~~~~~~~~~
arch/mips/loongson64/env.c:190:31: note: change the argument to be the free space in the destination buffer minus the terminating null byte
190 | strncat(cpu_full_name, freq, sizeof(cpu_full_name));
| ^~~~~~~~~~~~~~~~~~~~~
| sizeof(cpu_full_name) - strlen(cpu_full_name) - 1
1 error generated.
可改为：
strncat(cpu_full_name, freq, sizeof(cpu_full_name) - strlen(cpu_full_name) - 1);
—
Reply to this email directly, view it on GitHub, or unsubscribe.
You are receiving this because you were assigned.Message ID: ***@***.***>
|
Suppress a Clang warning regarding potential buffer overflow: arch/mips/loongson64/env.c:190:31: error: the value of the size argument in 'strncat' is too large, might lead to a buffer overflow [-Werror,-Wstrncat-size] 190 | strncat(cpu_full_name, freq, sizeof(cpu_full_name)); | ^~~~~~~~~~~~~~~~~~~~~ arch/mips/loongson64/env.c:190:31: note: change the argument to be the free space in the destination buffer minus the terminating null byte 190 | strncat(cpu_full_name, freq, sizeof(cpu_full_name)); | ^~~~~~~~~~~~~~~~~~~~~ | sizeof(cpu_full_name) - strlen(cpu_full_name) - 1 1 error generated. Fixes: "BACKPORT: FROMLIST: MIPS: Add __cpu_full_name[] to make CPU names more human-readable" Signed-off-by: Mingcong Bai <jeffbai@aosc.io>
| @@ -299,7 +299,7 @@ drivers-$(CONFIG_PCI) += arch/mips/pci/ | |||
| ifdef CONFIG_64BIT | |||
| ifndef KBUILD_SYM32 | |||
| ifeq ($(shell expr $(load-y) \< 0xffffffff80000000), 0) | |||
| KBUILD_SYM32 = y | |||
| KBUILD_SYM32 = $(call cc-option-yn, -msym32) | |||
| /* | ||
| * The following registers are determined by the EC index configureation. | ||
| * 1. fill the PORT_INDEX as EC register. | ||
| * 2. fill the PORT_DATA as EC register write data or get the data from it. |
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WARNING: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
| * Allow physical addresses to be fixed up to help peripherals located | ||
| * outside the low 32-bit range -- generic pass-through version. | ||
| */ | ||
| static inline phys_addr_t fixup_bigphys_addr(phys_addr_t phys_addr, phys_addr_t size) |
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WARNING: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
| @@ -36,7 +36,7 @@ struct temp_range { | |||
| struct loongson_fan_policy { | |||
| u8 type; | |||
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| /* percent only used when type is CONSTANT_SPEED_POLICY */ | |||
| /* CONSTANT_SPEED_POLICY: actual perenct, STEP_SPEED_POLICY: maximum percent */ | |||
There was a problem hiding this comment.
WARNING: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
| @@ -131,6 +131,9 @@ static inline u32 read_cpucfg(u32 reg) | |||
| #define LOONGSON_CFG7_GCCAEQRP BIT(0) | |||
| #define LOONGSON_CFG7_UCAWINP BIT(1) | |||
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| #define CSR_TO_RAW_ADDR(cpu, csr) ((0x900000003ff00000 | csr | \ | |||
| (((u64)cpu & 0xc) << 42)) | (((u64)cpu & 0x3) << 8)) | |||
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| static inline bool cpu_has_csr(void) | |||
| { | |||
There was a problem hiding this comment.
ERROR: Avoid using diff content in the commit message - patch(1) might not work
| @@ -131,6 +131,9 @@ static inline u32 read_cpucfg(u32 reg) | |||
| #define LOONGSON_CFG7_GCCAEQRP BIT(0) | |||
| #define LOONGSON_CFG7_UCAWINP BIT(1) | |||
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| #define CSR_TO_RAW_ADDR(cpu, csr) ((0x900000003ff00000 | csr | \ | |||
| (((u64)cpu & 0xc) << 42)) | (((u64)cpu & 0x3) << 8)) | |||
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| static inline bool cpu_has_csr(void) | |||
| { | |||
There was a problem hiding this comment.
ERROR: patch seems to be corrupt (line wrapped?)
| @@ -131,6 +131,9 @@ static inline u32 read_cpucfg(u32 reg) | |||
| #define LOONGSON_CFG7_GCCAEQRP BIT(0) | |||
| #define LOONGSON_CFG7_UCAWINP BIT(1) | |||
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| #define CSR_TO_RAW_ADDR(cpu, csr) ((0x900000003ff00000 | csr | \ | |||
| (((u64)cpu & 0xc) << 42)) | (((u64)cpu & 0x3) << 8)) | |||
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| static inline bool cpu_has_csr(void) | |||
| { | |||
| if (cpu_has_cfg()) | |||
There was a problem hiding this comment.
WARNING: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
| #define CMD_GET_ENABLED_FEATURES 0x3 | ||
| /* Get currently enabled features, input index, output feature flags */ | ||
| #define CMD_SET_ENABLED_FEATURES 0x4 | ||
| /* Set features enabled state, input index and flags, output sucessfully enabled flags */ |
There was a problem hiding this comment.
WARNING: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
| @@ -27,6 +27,8 @@ struct vm_area_struct; | |||
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| #define PAGE_SHARED vm_get_page_prot(VM_READ|VM_WRITE|VM_SHARED) | |||
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| #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_NO_READ | \ | |||
| _page_cachable_default) | |||
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WARNING: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
| @@ -42,6 +42,10 @@ void uasm_i##op(u32 **buf, unsigned int a, signed int b, unsigned int c) | |||
| #define Ip_s3s1s2(op) \ | |||
| void uasm_i##op(u32 **buf, int a, int b, int c) | |||
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| #define Ip_u4u2u1s3(op) \ | |||
| void uasm_i##op(u32 **buf, unsigned int a, unsigned int b, signed int c, \ | |||
There was a problem hiding this comment.
WARNING: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
| @@ -42,6 +42,10 @@ void uasm_i##op(u32 **buf, unsigned int a, signed int b, unsigned int c) | |||
| #define Ip_s3s1s2(op) \ | |||
| void uasm_i##op(u32 **buf, int a, int b, int c) | |||
|
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| #define Ip_u4u2u1s3(op) \ | |||
| void uasm_i##op(u32 **buf, unsigned int a, unsigned int b, signed int c, \ | |||
| unsigned int d) | |||
There was a problem hiding this comment.
ERROR: Avoid using diff content in the commit message - patch(1) might not work
| @@ -42,6 +42,10 @@ void uasm_i##op(u32 **buf, unsigned int a, signed int b, unsigned int c) | |||
| #define Ip_s3s1s2(op) \ | |||
| void uasm_i##op(u32 **buf, int a, int b, int c) | |||
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| #define Ip_u4u2u1s3(op) \ | |||
| void uasm_i##op(u32 **buf, unsigned int a, unsigned int b, signed int c, \ | |||
| unsigned int d) | |||
There was a problem hiding this comment.
ERROR: patch seems to be corrupt (line wrapped?)
| @@ -15,25 +15,31 @@ | |||
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| #include <asm/sgidefs.h> | |||
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| #if _MIPS_SIM == _MIPS_SIM_ABI32 | |||
| #if (defined(__WANT_SYSCALL_NUMBERS) && \ | |||
There was a problem hiding this comment.
WARNING: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
deepin pr auto review-- |
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Backport most patches from the old Lemote tree to linux-6.6.y. This kernel is tested on 3A4000 and 3B4000 platforms.