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PTW: check all reserved bits for non-leaf ptes #3408

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poemonsense
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Non-leaf PTEs should not have any of D, A, and U bits set, otherwise a page-fault exception is raised.

Previously rocket-chip is missing the condition for D, A, and U bits.

Related issue:

Type of change: bug report

Impact: API modification

Development Phase: implementation

Release Notes

See #3402 (comment) for more information on the bug.

@poemonsense
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@aswaterman Would you mind take a quick look at this as well? Rocket-chip is missing the conditions for non-leaf page-fault. It checks the conditions in table but fails to report it as a page-fault. Thanks.

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cc @ingallsj again, but this looks right to me.

I'd suggest the name isReservedIfNonLeaf.

@ingallsj ingallsj self-requested a review July 6, 2023 21:08
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ingallsj commented Jul 6, 2023

Looking, and attempting to reproduce the bug and fix ourselves, too. Standby.

Non-leaf PTEs should not have any of D, A, and U bits set, otherwise
a page-fault exception is raised.
@poemonsense poemonsense force-pushed the fix-ptw-reserved-non-leaf-ptes branch from 884cc13 to a0f79ee Compare July 7, 2023 01:03
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Changed the name to isReservedIfNonLeaf as suggested.

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Because the definition of a non-leaf "table" PTE is that the R,W,X permission bits are zeroes "off", the L1TLB (ITLB/DTLB) then goes on to report a page fault, even though the PTW response did not explicitly include the pf bit set.

So we think that this change would add redundant logic to what the L1TLB (ITLB/DTLB) already performs, and we don't think there is a bug that this change fixes.

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After double-checking the case, I found you are right and this bug depends on a wrong patch for #3407. Before I submit the final and correct PR for that, I had a bad patch trying to fix #3407. This bug is only feasible in that version.

Sorry for the confusion and thanks for your work. I'll close this PR.

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3 participants