Fix rare TLB refill/invalidate race condition #2534
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If an SFENCE.VMA with rs1 != x0 or rs2 != x0 happens on the same cycle as an I-TLB refill, the refill still occurs, even if the SFENCE.VMA should've flushed the entry being refilled. SFENCE.VMA with rs1=x0 and rs2=x0 is unaffected. It's exceedingly difficult, but possible, to manifest this bug. We found it by inspection (thanks @khannaudit), not by observing it in the wild.
This signal is sometimes slow to compute, so avoid fanning it out to the clock-enables for the entire TLB. Instead, make only the valid signals depend on its output.
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Fix rare TLB refill/invalidate race condition
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If an SFENCE.VMA with rs1 != x0 or rs2 != x0 happens on the same cycle as an I-TLB refill, the refill still occurs, even if the SFENCE.VMA should've flushed the entry being refilled.
SFENCE.VMA with rs1=x0 and rs2=x0 is unaffected.
It's exceedingly difficult to manifest this bug. We found it by inspection (thanks @khannaudit), not by observing it in the wild.