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TraceGenConfig Incompatibility #2920

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jrarnold123 opened this issue Dec 21, 2021 · 1 comment
Closed

TraceGenConfig Incompatibility #2920

jrarnold123 opened this issue Dec 21, 2021 · 1 comment

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@jrarnold123
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Type of issue: bug report

Impact: unknown

Development Phase: request

Other information

If the current behavior is a bug, please provide the steps to reproduce the problem:

Running make CONFIG=freechips.rocketchip.system.TraceGenConfig fails, after TraceGenConfig and associated components are added to the main Config.scala file. Specifying a BusTopology does not resolve the issue.

What is the current behavior?

PreElaboration failure resulting from invalid network graph.

Please tell us about your environment:

  • version: git commit 330c2b8
  • OS: Ubuntu 18.04.6 LTS
  • PATH includes the scripts directory

What is the use case for changing the behavior?
Testing GroundTest traces on the memory system

@michael-etzkorn
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michael-etzkorn commented Dec 28, 2021

So I don't know what your custom TraceGenConfig looks like or your TestHarness, but assuming you're using the groundtest TestHarness, and you've set up to use GroundTestBaseConfig, I was able to get past Diplomacy errors by commenting out this line in GroundTestSubsystem

IntSinkNode(IntSinkPortSimple()) :=* ibus.toPLIC

I'm not sure why it was included if GroundTestSubsystem sets PLIC's Key to None? But yeah looks like HeterogeneousTileExampleConfig for the groundtest TestHarness doesn't work out of the box with WithTraceGen because of a failed diplomatic graph for the interrupt node and PRCI which is fixed with setting SubsystemExternalResetVectorKey => true. It also doesn't work with the ExampleRocketSystem's TestHarness.

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