Merge commit '749a3ea' into ifv

.github/workflows/mill-ci.yml

@@ -72,7 +72,7 @@ jobs:
     if: ${{ false }}  # disable for now, I prefer adding firesim-based simulation framework in the future.
     strategy:
       matrix:
-        config: ["DefaultRV32Config,32,RV32IMACZicsr_Zifencei", "DefaultConfig,64,RV64IMACZicsr_Zifencei", "BitManipCryptoConfig,64,RV64IZba_Zbb_Zbc_Zbkb_Zbkc_Zbkx_Zbs_Zknd_Zkne_Zknh_Zksed_Zksh", "BitManipCrypto32Config,32,RV32IZba_Zbb_Zbc_Zbkb_Zbkc_Zbkx_Zbs_Zknd_Zkne_Zknh_Zksed_Zksh"]
+        config: ["DefaultRV32Config,32,RV32IMACZicsr_Zifencei", "DefaultConfig,64,RV64IMACZicsr_Zifencei"]
     steps:
       - uses: actions/checkout@v2
         with:

.gitmodules

@@ -1,9 +1,9 @@
-[submodule "hardfloat"]
-	path = hardfloat
+[submodule "dependencies/hardfloat"]
+	path = dependencies/hardfloat
 	url = https://github.com/ucb-bar/berkeley-hardfloat.git
-[submodule "torture"]
-	path = torture
-	url = https://github.com/ucb-bar/riscv-torture.git
-[submodule "cde"]
-	path = cde
+[submodule "dependencies/cde"]
+	path = dependencies/cde
 	url = https://github.com/chipsalliance/cde.git
+[submodule "dependencies/chisel"]
+	path = dependencies/chisel
+	url = https://github.com/chipsalliance/chisel.git

Makefile

@@ -0,0 +1,14 @@
+base_dir=$(abspath ./)
+
+CHISEL_VERSION=3.6.0
+MODEL ?= TestHarness
+PROJECT ?= freechips.rocketchip.system
+CFG_PROJECT ?= $(PROJECT)
+CONFIG ?= $(CFG_PROJECT).DefaultConfig
+MILL ?= mill
+
+verilog:
+	cd $(base_dir) && $(MILL) emulator[freechips.rocketchip.system.TestHarness,$(CONFIG)].mfccompiler.compile
+
+clean:
+	rm -rf out/