remove one line license reference from top of source files

src/main/scala/clocks/Bundles.scala

@@ -1,4 +1,3 @@
-// See LICENSE.SiFive for license details.
 package sifive.fpgashells.clocks
 
 import Chisel._

src/main/scala/clocks/ClockGroup.scala

@@ -1,4 +1,3 @@
-// See LICENSE.SiFive for license details.
 package sifive.fpgashells.clocks
 
 import Chisel._

src/main/scala/clocks/Nodes.scala

@@ -1,4 +1,3 @@
-// See LICENSE.SiFive for license details.
 package sifive.fpgashells.clocks
 
 import Chisel._

src/main/scala/clocks/PLLFactory.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.clocks
 
 import chisel3._

src/main/scala/clocks/Parameters.scala

@@ -1,4 +1,3 @@
-// See LICENSE.SiFive for license details.
 package sifive.fpgashells.clocks
 
 import Chisel._

src/main/scala/clocks/ResetWrangler.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.clocks
 
 import chisel3._

src/main/scala/devices/microsemi/polarfire_ddr3/MicrosemiPolarFireDDR3.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.devices.microsemi.polarfireddr3
 
 import Chisel._

src/main/scala/devices/microsemi/polarfire_ddr3/MicrosemiPolarFireDDR3Periphery.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.devices.microsemi.polarfireddr3
 
 import Chisel._

src/main/scala/devices/microsemi/polarfire_ddr4/MicrosemiPolarFireDDR4.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.devices.microsemi.polarfireddr4
 
 import Chisel._

src/main/scala/devices/microsemi/polarfire_ddr4/MicrosemiPolarFireDDR4Periphery.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.devices.microsemi.polarfireddr4
 
 import Chisel._

src/main/scala/devices/microsemi/polarfire_pcie/PolarFireEvalKitPCIeX4.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.devices.microsemi.polarfireevalkitpciex4
 
 import Chisel._

src/main/scala/devices/microsemi/polarfire_pcie/PolarFireEvalKitPCIeX4Periphery.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.devices.microsemi.polarfireevalkitpciex4
 
 import Chisel._

src/main/scala/devices/xilinx/ethernet/ethernet.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.devices.xilinx.ethernet
 
 import chisel3._

src/main/scala/devices/xilinx/xdma/XDMA.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.devices.xilinx.xdma
 
 import chisel3._

src/main/scala/devices/xilinx/xdma/package.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.devices.xilinx
 
 package object xdma

src/main/scala/devices/xilinx/xilinxarty100tmig/XilinxArty100TMIG.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.devices.xilinx.xilinxarty100tmig
 
 import Chisel._

src/main/scala/devices/xilinx/xilinxvc707mig/XilinxVC707MIG.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.devices.xilinx.xilinxvc707mig
 
 import Chisel._

src/main/scala/devices/xilinx/xilinxvc707mig/XilinxVC707MIGPeriphery.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.devices.xilinx.xilinxvc707mig
 
 import Chisel._

src/main/scala/devices/xilinx/xilinxvc707pciex1/XilinxVC707PCIeX1.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.devices.xilinx.xilinxvc707pciex1
 
 import Chisel._

src/main/scala/devices/xilinx/xilinxvc707pciex1/XilinxVC707PCIeX1Periphery.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.devices.xilinx.xilinxvc707pciex1
 
 import Chisel._

src/main/scala/devices/xilinx/xilinxvcu118mig/XilinxVCU118MIG.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.devices.xilinx.xilinxvcu118mig
 
 import Chisel._

src/main/scala/devices/xilinx/xilinxvcu118mig/XilinxVCU118MIGPeriphery.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.devices.xilinx.xilinxvcu118mig
 
 import Chisel._

src/main/scala/ip/microsemi/corejtagdebug/corejtagdebug.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.microsemi.corejtagdebug
 
 import Chisel._

src/main/scala/ip/microsemi/polarfire.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.microsemi
 
 import Chisel._

src/main/scala/ip/microsemi/polarfire_ccc/PolarFireCCC.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.microsemi.polarfireccc
 
 import Chisel._

src/main/scala/ip/microsemi/polarfire_clock_divider/PolarFireClockDivider.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.microsemi.polarfireclockdivider
 
 import Chisel._

src/main/scala/ip/microsemi/polarfire_ddr3/PolarFireDDR3.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.microsemi.polarfireddr3
 
 import Chisel._

src/main/scala/ip/microsemi/polarfire_ddr4/PolarFireDDR4.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.microsemi.polarfireddr4
 
 import Chisel._

src/main/scala/ip/microsemi/polarfire_dll/PolarFireDLL.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.microsemi.polarfiredll
 
 import Chisel._

src/main/scala/ip/microsemi/polarfire_glitchless_mux/PolarFireGlitchlessMux.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.microsemi.polarfireglitchlessmux
 
 import Chisel._

src/main/scala/ip/microsemi/polarfire_init_monitor/PolarFireInitMonitor.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.microsemi.polarfireinitmonitor
 
 import Chisel._

src/main/scala/ip/microsemi/polarfire_oscillator/PolarFireOscillator.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.microsemi.polarfire_oscillator
 
 import Chisel._

src/main/scala/ip/microsemi/polarfire_pcie_rootport/PolarFirePCIeRootPort.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.microsemi.polarfirepcierootport
 
 import Chisel._

src/main/scala/ip/microsemi/polarfire_reset/PolarFireReset.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.microsemi.polarfirereset
 
 import Chisel._

src/main/scala/ip/microsemi/polarfire_tx_pll/PolarFireTxPLL.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.microsemi.polarfiretxpll
 
 import Chisel._

src/main/scala/ip/microsemi/polarfire_xcvr_refclk/PolarFireTransceiverRefClk.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.microsemi.polarfirexcvrrefclk
 
 import Chisel._

src/main/scala/ip/xilinx/Unisim.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 
 package sifive.fpgashells.ip.xilinx
 import Chisel._

src/main/scala/ip/xilinx/Xilinx.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.xilinx
 
 import Chisel._

src/main/scala/ip/xilinx/arty100tmig/arty100tmig.scala

@@ -1,4 +1,3 @@
-package sifive.fpgashells.ip.xilinx.arty100tmig
 
 import Chisel._
 import chisel3.experimental.{Analog,attach}

src/main/scala/ip/xilinx/bscan/bscan.scala

@@ -1,5 +1,4 @@
 package sifive.fpgashells.ip.xilinx.bscan2
-
 import chisel3._
 import chisel3.util._
 import chisel3.experimental.{ExtModule, Analog, attach}

src/main/scala/ip/xilinx/ibufds_gte2/ibufds_gte2.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.xilinx.ibufds_gte2
 
 import Chisel._

src/main/scala/ip/xilinx/vc707axi_to_pcie_x1/vc707axi_to_pcie_x1.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.xilinx.vc707axi_to_pcie_x1
 
 import Chisel._

src/main/scala/ip/xilinx/vc707mig/vc707mig.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.xilinx.vc707mig
 
 import Chisel._

src/main/scala/ip/xilinx/vcu118mig/vcu118mig.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.xilinx.vcu118mig
 
 import Chisel._

src/main/scala/ip/xilinx/xdma/xdma.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.xilinx.xdma
 
 import chisel3._

src/main/scala/ip/xilinx/xxv_ethernet/nfmac10g.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.xilinx.xxv_ethernet
 
 import chisel3._

src/main/scala/ip/xilinx/xxv_ethernet/xxv_ethernet.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.ip.xilinx.xxv_ethernet
 
 import chisel3._

src/main/scala/shell/ButtonOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/CTSResetOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/ChipLinkOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/ClockOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/DDROverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/Ethernet.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/GPIOOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/GPIOPMODOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/I2COverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/IOShell.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/JTAGDebugBScanOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/JTAGDebugOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/LEDOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/PCIeOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/PMODOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/PWMOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/PinOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/PorGenOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/SPIFlashOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/SPIOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/Shell.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/SwitchOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/TracePMODOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/UARTOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/Util.scala

@@ -1,4 +1,3 @@
-package sifive.fpgashells.shell
 
 import chisel3._
 import chisel3.experimental.{Analog, attach}

src/main/scala/shell/cJTAGDebugOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell
 
 import chisel3._

src/main/scala/shell/microsemi/ChipLinkOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell.microsemi
 
  import chisel3._

src/main/scala/shell/microsemi/ClockOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell.microsemi
 
  import chisel3._

src/main/scala/shell/microsemi/LEDOverlay.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell.microsemi
 
  import chisel3._

src/main/scala/shell/microsemi/PolarFireEvalKitShell.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell.microsemi.polarfireevalkitshell
 
 import Chisel._

src/main/scala/shell/microsemi/PolarFireShell.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell.microsemi
 
  import chisel3._

src/main/scala/shell/microsemi/VeraShell.scala

@@ -1,4 +1,3 @@
-// See LICENSE for license details.
 package sifive.fpgashells.shell.microsemi
 
 import chisel3._