Make firtool options for elaborateGeneratedModule in workspace parametric

[rameloni]

Fixes #3932

Contributor Checklist

• Did you add Scaladoc to every public function/method?
• Did you add at least one test demonstrating the PR?
• Did you delete any extraneous printlns/debugging code?
• Did you specify the type of improvement?
• Did you add appropriate documentation in docs/src?
• Did you request a desired merge strategy?
• Did you add text to be included in the Release Notes for this change?

Type of Improvement

• Feature (or new API)
• API modification

Desired Merge Strategy

• Squash: The PR will be squashed and merged (choose this if you have no preference).

Release Notes

This adds the support in Chiselsim to configure the workspace with additional args for firtool (#3932). The user can specify how the sv circuit is compiled for simulation (i.e. including debug information -g).

Reviewer Checklist (only modified by reviewer)

• Did you add the appropriate labels? (Select the most appropriate one based on the "Type of Improvement")
• Did you mark the proper milestone (Bug fix: 3.6.x, 5.x, or 6.x depending on impact, API modification or big change: 7.0)?
• Did you review?
• Did you check whether all relevant Contributor checkboxes have been checked?
• Did you do one of the following when ready to merge:
  • Squash: You/ the contributor Enable auto-merge (squash), clean up the commit message, and label with Please Merge.
  • Merge: Ensure that contributor has cleaned up their commit history, then merge with Create a merge commit.

[linux-foundation-easycla]

The committers listed above are authorized under a signed CLA.

• ✅ login: rameloni / name: Raffaele Meloni (a7d5f67, b4fc251)
• ✅ login: jackkoenig / name: Jack Koenig (199b6ec)

[jackkoenig]

Apologies for missing your issue, but this LGTM! It would be nice to expose this on EphemeralSimulator as well, but it's a useful improvement as is!

[jackkoenig]

You can run formatting on the code with sbt fmt, I've run formatting and pushed to your PR

[rameloni]

You can run formatting on the code with sbt fmt, I've run formatting and pushed to your PR

Yes sure! I think intellij idea automatically reformatted the code with another fmt style. I will make sure to check it next time.

[rameloni]

Apologies for missing your issue, but this LGTM! It would be nice to expose this on EphemeralSimulator as well, but it's a useful improvement as is!

Actually, I am already working on a "parametric" simulator that also makes use of custom firtool options for my project. However, it also includes some other functionalities that are specific for my project but not all of them (some are more generic like vcd/fst emission).

[jackkoenig]

Yes sure! I think intellij idea automatically reformatted the code with another fmt style. I will make sure to check it next time.

Coincidentally it did a pretty good job, it just missed 1 rule/file 😂. Maybe it automatically picked up our format rules but didn't format that file? 🤷‍♀️

Actually, I am already working on a "parametric" simulator that also makes use of custom firtool options for my project. However, it also includes some other functionalities that are specific for my project but not all of them (some are more generic like vcd/fst emission).

Neat! Well if there's anything that you think belongs in upstream, please feel free to open issues or PRs.