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Convert Vec dynamic index with a literal to static index #3314

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Jun 2, 2023
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6 changes: 6 additions & 0 deletions core/src/main/scala/chisel3/Aggregate.scala
Original file line number Diff line number Diff line change
Expand Up @@ -297,6 +297,12 @@ sealed class Vec[T <: Data] private[chisel3] (gen: => T, val length: Int) extend
requireIsHardware(this, "vec")
requireIsHardware(p, "vec index")

// Don't bother with complex dynamic indexing logic when the index is a literal and therefore static
p.litOption match {
case Some(idx) if idx < length => return this.apply(idx.intValue)
case _ => // Fall through to control flow below
}

// Special handling for views
if (isView(this)) {
reifySingleData(this) match {
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20 changes: 20 additions & 0 deletions src/test/scala/chiselTests/Vec.scala
Original file line number Diff line number Diff line change
Expand Up @@ -393,4 +393,24 @@ class VecSpec extends ChiselPropSpec with Utils {
chirrtl should include("reg reg : { }[4]")
}
}

property("Vecs should emit static indices when indexing with a literal UInt") {
val chirrtl = emitCHIRRTL(new RawModule {
val vec = IO(Input(Vec(4, UInt(8.W))))
val out = IO(Output(UInt(8.W)))
out := vec(1.U)
})
chirrtl should include("out <= vec[1]")
}

// This is checking existing behavior, not because it's good but because we accidentally broke it.
// This behavior is slated to be deprecated and removed.
property("Vecs should support out-of-bounds dynamic indices") {
val chirrtl = emitCHIRRTL(new RawModule {
val vec = IO(Input(Vec(4, UInt(8.W))))
val out = IO(Output(UInt(8.W)))
out := vec(10.U)
})
chirrtl should include("""out <= vec[UInt<2>("h2")]""")
}
}
2 changes: 1 addition & 1 deletion src/test/scala/chiselTests/VecToTargetSpec.scala
Original file line number Diff line number Diff line change
Expand Up @@ -72,7 +72,7 @@ class VecToTargetSpec extends ChiselFunSpec with VecToTargetSpecUtils {
}

describe("with a Chisel literal") {
(it should behave).like(conversionFails(foo.vecSubaccessChiselLit))
(it should behave).like(conversionSucceeds(foo.vecSubaccessChiselLit))
}

describe("with a Node") {
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