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Add test of external modules to ChiselSim tests (#3889)
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This tests that compilation with an external module works (as well as
testing that reading from a port driven from an external module
works---which doesn't provide any additional coverage).  This is
highlighting a problem in CIRCT beyond 1.66.0 where this relies on a
`filelist.f` file being produced which includes information about all
external modules.  This was dropped in a later commit [[1]] and needs to
be fixed.  This commit is intending to cause nightly to fail, demonstrate
the problem, and provide a check so that we know things are back to
working.

[1]: llvm/circt#6729

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
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seldridge authored Mar 1, 2024
1 parent 4985f32 commit ef7de52
Showing 1 changed file with 30 additions and 0 deletions.
30 changes: 30 additions & 0 deletions src/test/scala/chiselTests/simulator/SimulatorSpec.scala
Original file line number Diff line number Diff line change
@@ -1,7 +1,9 @@
package chiselTests.simulator

import chisel3._
import chisel3.experimental.ExtModule
import chisel3.simulator._
import chisel3.util.HasExtModuleInline
import org.scalatest.funspec.AnyFunSpec
import org.scalatest.matchers.must.Matchers
import svsim._
Expand Down Expand Up @@ -67,5 +69,33 @@ class SimulatorSpec extends AnyFunSpec with Matchers {
.result
assert(result === 12)
}

it("runs a design that includes an external module") {
class Bar extends ExtModule with HasExtModuleInline {
val a = IO(Output(Bool()))
setInline(
"Bar.sv",
"""|module Bar(
| output a
|);
| assign a = 1'b1;
|endmodule
|""".stripMargin
)
}

class Foo extends RawModule {
val a = IO(Output(Bool()))
a :<= Module(new Bar).a
}

new VerilatorSimulator("test_run_dir/simulator/extmodule")
.simulate(new Foo) { module =>
import PeekPokeAPI._
val foo = module.wrapped
foo.a.expect(1)
}
.result
}
}
}

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