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Add double_trig output, hold 1st triggered trig_pixel abd update expo…
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…rted RTL
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@cescalara
cescalara committed Apr 18, 2018
1 parent aae5252 commit a92a2ab
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Showing 81 changed files with 20,458 additions and 13,531 deletions.
22 changes: 15 additions & 7 deletions l2_trigger/cpp_code/v10/l2_trigger.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -14,13 +14,14 @@ The pixel mask is not yet implemented


void l2_trigger(STREAM_32 &in_stream, STREAM_64 &out_stream, uint16_t n_pixels_in_bus,
uint8_t N_BG, uint32_t LOW_THRESH,
uint8_t N_BG, uint32_t LOW_THRESH, volatile unsigned int *double_trig,
volatile unsigned int *trig_data, volatile unsigned int *trig_pixel){

//Define the interfaces
#pragma HLS INTERFACE axis port = in_stream
#pragma HLS INTERFACE ap_ovld port = trig_data
#pragma HLS INTERFACE ap_ovld port = trig_pixel
#pragma HLS INTERFACE ap_ovld port = double_trig
#pragma HLS INTERFACE axis port = out_stream
#pragma HLS INTERFACE s_axilite port=n_pixels_in_bus bundle=CTRL_BUS
#pragma HLS INTERFACE s_axilite port=N_BG bundle=CTRL_BUS
Expand All @@ -42,6 +43,7 @@ void l2_trigger(STREAM_32 &in_stream, STREAM_64 &out_stream, uint16_t n_pixels_i
//Initialisation
*trig_data = 0;
*trig_pixel = 0;
*double_trig = 0;
for(i = 0; i < n_pixels_in_bus/2; i++) {
sum_pix1[i] = 0;
sum_pix2[i] = 0;
Expand Down Expand Up @@ -100,35 +102,41 @@ void l2_trigger(STREAM_32 &in_stream, STREAM_64 &out_stream, uint16_t n_pixels_i
sum_overP2[i] += data_shift2[0][i];

//Trigger decision
if(sum_overP1[i] > thresh1[i]) {
if (sum_overP2[i] > thresh2[i]) {

if(itrig == 0) {
if (itrig == 0) {
//Pulse trigger wire for 1 clock
*trig_data = 0x00000001;
*trig_data = 0x00000000;

//store the triggered pixel
*trig_pixel = i*2;
*trig_pixel = (i*2) + 1;

//Block for 128 GTU
itrig = 1;
}
}
else if (sum_overP2[i] > thresh2[i] ) {
else if(sum_overP1[i] > thresh1[i]) {

if (itrig == 0) {
if(itrig == 0) {
//Pulse trigger wire for 1 clock
*trig_data = 0x00000001;
*trig_data = 0x00000000;

//store the triggered pixel
*trig_pixel = (i*2) + 1;
*trig_pixel = i*2;

//Block for 128 GTU
itrig = 1;
}
} // Trigger decision

//Report double trigger
if (sum_overP1[i] > thresh1[i] && sum_overP2[i] > thresh2[i]) {

*double_trig = 1;
}

}
}

Expand Down
2 changes: 1 addition & 1 deletion l2_trigger/cpp_code/v10/l2_trigger.h
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Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,7 @@ typedef hls::stream<AXI_DATA_32> STREAM_32;
typedef hls::stream<AXI_DATA_64> STREAM_64;

void l2_trigger(STREAM_32 &in_data, STREAM_64 &out_data, uint16_t n_pixels_in_bus,
uint8_t N_BG, uint32_t LOW_THRESH,
uint8_t N_BG, uint32_t LOW_THRESH, volatile unsigned int *double_trig,
volatile unsigned int *trig_data, volatile unsigned int *trig_pixel);

#endif
7 changes: 5 additions & 2 deletions l2_trigger/cpp_code/v10/l2_trigger_test.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -41,11 +41,14 @@ int main() {

volatile unsigned int *trig_data_HW;
volatile unsigned int *trig_pixel_HW;
volatile unsigned int val_data, val_pixel;
volatile unsigned int *double_trig;
volatile unsigned int val_data, val_pixel, val_double_trig;
trig_data_HW = &val_data;
trig_pixel_HW = &val_pixel;
double_trig = &val_double_trig;
val_data = 0;
val_pixel = 0;
val_double_trig = 0;

printf("trig_data_HW: %u\n", *trig_data_HW);

Expand Down Expand Up @@ -155,7 +158,7 @@ int main() {
/* HARDWARE IMPLEMENTATION */
#ifdef HW_COSIM
//Run the Vivado HLS trigger
l2_trigger(in_stream_HW, out_stream_HW, n_pixels_in_bus, N_BG, LOW_THRESH, trig_data_HW, trig_pixel_HW);
l2_trigger(in_stream_HW, out_stream_HW, n_pixels_in_bus, N_BG, LOW_THRESH, double_trig, trig_data_HW, trig_pixel_HW);
#endif


Expand Down
203 changes: 203 additions & 0 deletions l2_trigger/solution1/.autopilot/db/__ctype_info__.xml
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Original file line number Diff line number Diff line change
@@ -0,0 +1,203 @@
<InterfaceSummary>
<RtlPorts>
<name>in_stream_V_data_V</name>
<CType>
<TypeName>ap_int 32</TypeName>
<TypeWidth>32</TypeWidth>
<PhysicalWidth>32</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>in_stream_V_keep_V</name>
<CType>
<TypeName>ap_uint 4</TypeName>
<TypeWidth>4</TypeWidth>
<PhysicalWidth>4</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>in_stream_V_strb_V</name>
<CType>
<TypeName>ap_uint 4</TypeName>
<TypeWidth>4</TypeWidth>
<PhysicalWidth>4</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>in_stream_V_user_V</name>
<CType>
<TypeName>ap_uint 2</TypeName>
<TypeWidth>2</TypeWidth>
<PhysicalWidth>2</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>in_stream_V_last_V</name>
<CType>
<TypeName>ap_uint 1</TypeName>
<TypeWidth>1</TypeWidth>
<PhysicalWidth>1</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>in_stream_V_id_V</name>
<CType>
<TypeName>ap_uint 5</TypeName>
<TypeWidth>5</TypeWidth>
<PhysicalWidth>5</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>in_stream_V_dest_V</name>
<CType>
<TypeName>ap_uint 6</TypeName>
<TypeWidth>6</TypeWidth>
<PhysicalWidth>6</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>out_stream_V_data_V</name>
<CType>
<TypeName>ap_int 64</TypeName>
<TypeWidth>64</TypeWidth>
<PhysicalWidth>64</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>out_stream_V_keep_V</name>
<CType>
<TypeName>ap_uint 8</TypeName>
<TypeWidth>8</TypeWidth>
<PhysicalWidth>8</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>out_stream_V_strb_V</name>
<CType>
<TypeName>ap_uint 8</TypeName>
<TypeWidth>8</TypeWidth>
<PhysicalWidth>8</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>out_stream_V_user_V</name>
<CType>
<TypeName>ap_uint 2</TypeName>
<TypeWidth>2</TypeWidth>
<PhysicalWidth>2</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>out_stream_V_last_V</name>
<CType>
<TypeName>ap_uint 1</TypeName>
<TypeWidth>1</TypeWidth>
<PhysicalWidth>1</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>out_stream_V_id_V</name>
<CType>
<TypeName>ap_uint 5</TypeName>
<TypeWidth>5</TypeWidth>
<PhysicalWidth>5</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>out_stream_V_dest_V</name>
<CType>
<TypeName>ap_uint 6</TypeName>
<TypeWidth>6</TypeWidth>
<PhysicalWidth>6</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>n_pixels_in_bus</name>
<CType>
<TypeName>unsigned short</TypeName>
<TypeWidth>16</TypeWidth>
<PhysicalWidth>16</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>N_BG</name>
<CType>
<TypeName>unsigned char</TypeName>
<TypeWidth>8</TypeWidth>
<PhysicalWidth>8</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>LOW_THRESH</name>
<CType>
<TypeName>unsigned int</TypeName>
<TypeWidth>32</TypeWidth>
<PhysicalWidth>32</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>double_trig</name>
<CType>
<TypeName>unsigned int</TypeName>
<TypeWidth>32</TypeWidth>
<PhysicalWidth>32</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>trig_data</name>
<CType>
<TypeName>unsigned int</TypeName>
<TypeWidth>32</TypeWidth>
<PhysicalWidth>32</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
<RtlPorts>
<name>trig_pixel</name>
<CType>
<TypeName>unsigned int</TypeName>
<TypeWidth>32</TypeWidth>
<PhysicalWidth>32</PhysicalWidth>
</CType>
<CFractionWidth>0</CFractionWidth>
<InvalidType>0</InvalidType>
</RtlPorts>
</InterfaceSummary>

10 changes: 6 additions & 4 deletions l2_trigger/solution1/.autopilot/db/hls_design_meta.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -20,10 +20,12 @@ const Port_Property HLS_Design_Meta::port_props[]={
Port_Property("out_stream_TLAST", 1, hls_out, 11, "axis", "out_data", 1),
Port_Property("out_stream_TID", 5, hls_out, 12, "axis", "out_data", 1),
Port_Property("out_stream_TDEST", 6, hls_out, 13, "axis", "out_data", 1),
Port_Property("trig_data", 32, hls_out, 17, "ap_ovld", "out_data", 1),
Port_Property("trig_data_ap_vld", 1, hls_out, 17, "ap_ovld", "out_vld", 1),
Port_Property("trig_pixel", 32, hls_out, 18, "ap_ovld", "out_data", 1),
Port_Property("trig_pixel_ap_vld", 1, hls_out, 18, "ap_ovld", "out_vld", 1),
Port_Property("double_trig", 32, hls_out, 17, "ap_ovld", "out_data", 1),
Port_Property("double_trig_ap_vld", 1, hls_out, 17, "ap_ovld", "out_vld", 1),
Port_Property("trig_data", 32, hls_out, 18, "ap_ovld", "out_data", 1),
Port_Property("trig_data_ap_vld", 1, hls_out, 18, "ap_ovld", "out_vld", 1),
Port_Property("trig_pixel", 32, hls_out, 19, "ap_ovld", "out_data", 1),
Port_Property("trig_pixel_ap_vld", 1, hls_out, 19, "ap_ovld", "out_vld", 1),
Port_Property("s_axi_CTRL_BUS_AWVALID", 1, hls_in, -1, "", "", 1),
Port_Property("s_axi_CTRL_BUS_AWREADY", 1, hls_out, -1, "", "", 1),
Port_Property("s_axi_CTRL_BUS_AWADDR", 6, hls_in, -1, "", "", 1),
Expand Down
2 changes: 1 addition & 1 deletion l2_trigger/solution1/.autopilot/db/hls_design_meta.h
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Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@

struct HLS_Design_Meta {
// port data: name, bitwidth, direction (enumerator: hls_in, hls_out, hls_inout), group.
static const Port_Property port_props[42];
static const Port_Property port_props[44];
static const HLS_INT32 latency = -1;
static const HLS_INT32 II = -1;
static const char* dut_name;
Expand Down
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