Pinned Loading

1. Systolic_Array_FPGA Systolic_Array_FPGA Public

   FPGA implementation of a systolic array for accelerated matrix multiplication.

   VHDL

2. Systolic_Array_UVM Systolic_Array_UVM Public

   UVM testbench for my 3x3 matrix multiplier design

   SystemVerilog

3. MAC_2_Stage MAC_2_Stage Public

   2-stage Multiply Accumulate (MAC) unit with UVM testbench

   SystemVerilog

4. esp32c6-hts221-driver esp32c6-hts221-driver Public

   Driver code for the hts221 sensor written for a esp32c6 development board.

   C