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Improve WAST error messaging, NaN comparisons #2475

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merged 2 commits into from
Dec 4, 2020

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abrown
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@abrown abrown commented Dec 4, 2020

This should be helpful as we investigate #2432. Please note that the hex-ifying of the assertion expressions and Wasm values is pretty confusing: scalars are shown as big endian whereas vectors are shown as little endian (I tried to describe why in the comments). I would appreciate a careful look to ensure I did this correctly and any suggestions to reduce the verbosity would be great!

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abrown commented Dec 4, 2020

No idea what the trouble is with CI. It's failing during submodule checkout here?

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cfallin commented Dec 4, 2020

I was seeing that earlier too; after a few restarts the jobs went through. I had assumed it was some sort of spurious-failed-HTTP-request error. I'll hit the 're-run jobs' button for these...

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Seems reasonable to me!

crates/wast/src/wast.rs Outdated Show resolved Hide resolved
reverse_lanes(v.iter(), |b| as_hex_pattern(&b.to_le_bytes()))
}
wast::V128Pattern::F32x4(v) => {
reverse_lanes(v.iter(), |b| reverse_pattern(b.as_hex_pattern()))
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Insteaad of reverse_pattern could this use to_le_bytes() as well?

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Unfortunately, no. Because the float patterns are enums of either a canonical NaN pattern, an arithmetic NaN pattern (where the payload bits are unspecified), and an actual value, I emit special hex strings for these. I can't just reverse these hex strings: I have to reverse 2-char chunks (2 hex chars per byte) and remove the leading 0x.

// little-endian order. This implementation must include special behavior for this reversal; other
// implementations do not because they deal with raw values (`u128`) or use big-endian order for
// display (scalars).
impl AsHexPattern for wast::V128Pattern {
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@uweigand, as an FYI: I've tried to avoid this type of endianness-aware code but I didn't really know how to do this otherwise. If there is something we can do as a part of #2124 let me know.

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@abrown Thanks for the ping! I believe your currrent code here is fine for both little- and big-endian host systems: the way V128 constants are formed should be the same on both as far as I can see (little-endian lane order and little-endian byte order within each lane).

#2124 is only relevant where it's about implementing v128.load and so on. This is not currently part of my #2124 patch because I do not yet have any SIMD support on IBM Z; I'll have a look later.

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4 participants