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x64 New Assembler Ideas/Pain points #10238
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I've got some commits addressing a few things here over at https://github.com/alexcrichton/wasmtime/commits/x64-cleanups but I'm running out of steam given how many are accumulating so I'm going to set it aside for now. |
Makes sense; should we just merge alexcrichton@89e0fb4?
Hm... while I think the ISLE integration certainly can be improved, I thought we would want to maintain a clear separation of the "read" and "read-write" types all the way up into ISLE. This allows us to distinguish when we can just pass a
I was looking at this last week: I thought, "why must we always emit in these ISLE constructors?" If instead we just returned the
Yeah, I stopped spending much time on fixed registers when I saw we didn't use them much in the lowerings I was looking at. I think for |
(apologies for not being at the Cranelift meeting — other meetings interfered but I would have preferred to talk about this in person!) |
Sure!
Currently though ISLE is almost entirely in "SSA form" where the only use of In that sense I was thinking that the operands to an instruction should never be writable since everything is modeled as SSA, meaning that by default once something is produce you should lose the writable bit anyway. That means that all operands are To be clear though I'm not saying we should change the representation of the instructions. What I'm thinking is we change the signatures of the ISLE constructors and the implementation of the constructors (e.g. the generated macro) but that's it. The instructions continue to hold
I agree with your points! I was looking at To me the hard part here is that ISLE doesn't easily support returning pairs of values. Constructors in theory need to return both the result (e.g.
I'm not sure I quite understand what you're thinking here, could you elaborate? What I'm thinking is that on the cranelift-codegen side we fundamentally have a vreg rather than an actual register. During register allocation that'll get fixed to a particular register but the representation of the instruction has to have a slot for |
This commit is spawned out of discussion between me and Andrew in conjunction with the thoughts in bytecodealliance#10238. The goal here is to pave a way forward for various kinds of instructions in the future as well as give access to more instructions today we already have formats for. The major changes in this commit are: * `Assembler*` types are gone from ISLE, except for immediates. Instead types like `Gpr` and `GprMem` are used instead. * Rust-defined constructors for each instruction return `MInst` instead of implicitly performing an `emit` operation. * Instructions with a read/write `GprMem` operand now generate two ISLE constructors instead of one. One constructor takes `Gpr` and returns `Gpr`, the other takes `Amode` and returns `SideEffectNoResult`. * Generated ISLE constructors now match the SSA-like form of VCode/ISLE we already have. For example `AssemblerReadWriteGpr` is never used as a result, it's just `Gpr` instead. Conversions happen in Rust during construction of assembler instructions. Using this new support various `x64_*_mem` instructions have now moved over to the new assembler and using that instead. Looking to the future this is intended to make it easier to generate constructors that return `ProducesFlags` or `ConsumesFlags` such as `x64_adc` and friends. This will require more refactoring to enable this but the goal is to move roughly in such a direction. I've attempted to make this abstract enough that it'll be relatively easily extensible in the future to more ISLE constructors with minimal changes, so some abstractions here may not be fully used just yet but the hope is that they will be in the near future.
I've been poking at the new x64 assembler and I'm starting to accumulate a number of various things here and there so I wanted to write these down before I forgot. I had a rough high-level goal of "I'd like to implement
mul
(andimul
) instructions" and it led to most of these issues:Gpr
in Cranelift but something likeRax
during fuzzing.AssemblerReadWriteGpr
but this technically isn't correct, they should all takeAssemblerReadGpr
(note the lack of "Write"). (x64: Refactor assembler ISLE constructors #10276)AssemblerReadWriteGpr
, but like above they should probably beAssemblerReadGpr
instead. Basically the "write" part should mostly just be an internal detail that the ISLE bindings don't expose. (x64: Refactor assembler ISLE constructors #10276)x64_addb_mi
, should probably have two constructors in ISLE: one for the version that modifies a register and one that modifies memory. The former would returnAssemblerReadGpr
and the latter would returnSideEffectNoResult
. (x64: Refactor assembler ISLE constructors #10276)mul
, should returnValueRegs
instead of a single GPR.emit.rs
should be removed instead of acting as a catch-all (to help catch mistakes and additionally gradually clean things up) (x64: rework new assembler rule priorities, remove old emission rules #10260)Assembler*Write*
is removed from ISLE bindings (above bullets) then auto-conversions and various methods to/from other ISLE types should be removed as they shouldn't be necessary. (x64: Refactor assembler ISLE constructors #10276)cc @abrown
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