Add support for loongarch64

bytecodealliance · Mar 9, 2023 · b5f4c56 · b5f4c56
1 parent dd3de92
commit b5f4c56
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Showing 19 changed files with 503 additions and 26 deletions.
diff --git a/Cargo.toml b/Cargo.toml
@@ -38,7 +38,7 @@ once_cell = { version = "1.5.2", optional = true }
 # addition to the libc backend. The linux_raw backend is used by default. The
 # libc backend can be selected via adding `--cfg=rustix_use_libc` to
 # `RUSTFLAGS` or enabling the `use-libc` cargo feature.
-[target.'cfg(all(not(rustix_use_libc), not(miri), target_os = "linux", any(target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64"), all(target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "powerpc64", target_arch = "riscv64", target_arch = "mips", target_arch = "mips64")))))'.dependencies]
+[target.'cfg(all(not(rustix_use_libc), not(miri), target_os = "linux", any(target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64"), all(target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "powerpc64", target_arch = "riscv64", target_arch = "mips", target_arch = "mips64", target_arch = "loongarch64")))))'.dependencies]
 linux-raw-sys = { version = "0.3.0", default-features = false, features = ["general", "errno", "ioctl", "no_std"] }
 libc_errno = { package = "errno", version = "0.3.0", default-features = false, optional = true }
 libc = { version = "0.2.133", features = ["extra_traits"], optional = true }
@@ -47,7 +47,7 @@ libc = { version = "0.2.133", features = ["extra_traits"], optional = true }
 #
 # On all other Unix-family platforms, and under Miri, we always use the libc
 # backend, so enable its dependencies unconditionally.
-[target.'cfg(any(rustix_use_libc, miri, not(all(target_os = "linux", any(target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64"), all(target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "powerpc64", target_arch = "riscv64", target_arch = "mips", target_arch = "mips64")))))))'.dependencies]
+[target.'cfg(any(rustix_use_libc, miri, not(all(target_os = "linux", any(target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64"), all(target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "powerpc64", target_arch = "riscv64", target_arch = "mips", target_arch = "mips64", target_arch = "loongarch64")))))))'.dependencies]
 libc_errno = { package = "errno", version = "0.3.0", default-features = false }
 libc = { version = "0.2.133", features = ["extra_traits"] }
 

diff --git a/src/backend/linux_raw/arch/inline/loongarch64.rs b/src/backend/linux_raw/arch/inline/loongarch64.rs
@@ -0,0 +1,265 @@
+//! loongarch64 Linux system calls.
+
+use crate::backend::reg::{
+    ArgReg, FromAsm, RetReg, SyscallNumber, ToAsm, A0, A1, A2, A3, A4, A5, R0,
+};
+use core::arch::asm;
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall0_readonly(nr: SyscallNumber<'_>) -> RetReg<R0> {
+    let r0;
+    asm!(
+        "syscall 0",
+        in("$a7") nr.to_asm(),
+        lateout("$a0") r0,
+        options(nostack, preserves_flags, readonly)
+    );
+    FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> RetReg<R0> {
+    let r0;
+    asm!(
+        "syscall 0",
+        in("$a7") nr.to_asm(),
+        inlateout("$a0") a0.to_asm() => r0,
+        options(nostack, preserves_flags)
+    );
+    FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_readonly(
+    nr: SyscallNumber<'_>,
+    a0: ArgReg<'_, A0>,
+) -> RetReg<R0> {
+    let r0;
+    asm!(
+        "syscall 0",
+        in("$a7") nr.to_asm(),
+        inlateout("$a0") a0.to_asm() => r0,
+        options(nostack, preserves_flags, readonly)
+    );
+    FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_noreturn(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> ! {
+    asm!(
+        "syscall 0",
+        in("$a7") nr.to_asm(),
+        in("$a0") a0.to_asm(),
+        options(noreturn)
+    );
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2(
+    nr: SyscallNumber<'_>,
+    a0: ArgReg<'_, A0>,
+    a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+    let r0;
+    asm!(
+        "syscall 0",
+        in("$a7") nr.to_asm(),
+        inlateout("$a0") a0.to_asm() => r0,
+        in("$a1") a1.to_asm(),
+        options(nostack, preserves_flags)
+    );
+    FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2_readonly(
+    nr: SyscallNumber<'_>,
+    a0: ArgReg<'_, A0>,
+    a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+    let r0;
+    asm!(
+        "syscall 0",
+        in("$a7") nr.to_asm(),
+        inlateout("$a0") a0.to_asm() => r0,
+        in("$a1") a1.to_asm(),
+        options(nostack, preserves_flags, readonly)
+    );
+    FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3(
+    nr: SyscallNumber<'_>,
+    a0: ArgReg<'_, A0>,
+    a1: ArgReg<'_, A1>,
+    a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+    let r0;
+    asm!(
+        "syscall 0",
+        in("$a7") nr.to_asm(),
+        inlateout("$a0") a0.to_asm() => r0,
+        in("$a1") a1.to_asm(),
+        in("$a2") a2.to_asm(),
+        options(nostack, preserves_flags)
+    );
+    FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3_readonly(
+    nr: SyscallNumber<'_>,
+    a0: ArgReg<'_, A0>,
+    a1: ArgReg<'_, A1>,
+    a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+    let r0;
+    asm!(
+        "syscall 0",
+        in("$a7") nr.to_asm(),
+        inlateout("$a0") a0.to_asm() => r0,
+        in("$a1") a1.to_asm(),
+        in("$a2") a2.to_asm(),
+        options(nostack, preserves_flags, readonly)
+    );
+    FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4(
+    nr: SyscallNumber<'_>,
+    a0: ArgReg<'_, A0>,
+    a1: ArgReg<'_, A1>,
+    a2: ArgReg<'_, A2>,
+    a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+    let r0;
+    asm!(
+        "syscall 0",
+        in("$a7") nr.to_asm(),
+        inlateout("$a0") a0.to_asm() => r0,
+        in("$a1") a1.to_asm(),
+        in("$a2") a2.to_asm(),
+        in("$a3") a3.to_asm(),
+        options(nostack, preserves_flags)
+    );
+    FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4_readonly(
+    nr: SyscallNumber<'_>,
+    a0: ArgReg<'_, A0>,
+    a1: ArgReg<'_, A1>,
+    a2: ArgReg<'_, A2>,
+    a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+    let r0;
+    asm!(
+        "syscall 0",
+        in("$a7") nr.to_asm(),
+        inlateout("$a0") a0.to_asm() => r0,
+        in("$a1") a1.to_asm(),
+        in("$a2") a2.to_asm(),
+        in("$a3") a3.to_asm(),
+        options(nostack, preserves_flags, readonly)
+    );
+    FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5(
+    nr: SyscallNumber<'_>,
+    a0: ArgReg<'_, A0>,
+    a1: ArgReg<'_, A1>,
+    a2: ArgReg<'_, A2>,
+    a3: ArgReg<'_, A3>,
+    a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+    let r0;
+    asm!(
+        "syscall 0",
+        in("$a7") nr.to_asm(),
+        inlateout("$a0") a0.to_asm() => r0,
+        in("$a1") a1.to_asm(),
+        in("$a2") a2.to_asm(),
+        in("$a3") a3.to_asm(),
+        in("$a4") a4.to_asm(),
+        options(nostack, preserves_flags)
+    );
+    FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5_readonly(
+    nr: SyscallNumber<'_>,
+    a0: ArgReg<'_, A0>,
+    a1: ArgReg<'_, A1>,
+    a2: ArgReg<'_, A2>,
+    a3: ArgReg<'_, A3>,
+    a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+    let r0;
+    asm!(
+        "syscall 0",
+        in("$a7") nr.to_asm(),
+        inlateout("$a0") a0.to_asm() => r0,
+        in("$a1") a1.to_asm(),
+        in("$a2") a2.to_asm(),
+        in("$a3") a3.to_asm(),
+        in("$a4") a4.to_asm(),
+        options(nostack, preserves_flags, readonly)
+    );
+    FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6(
+    nr: SyscallNumber<'_>,
+    a0: ArgReg<'_, A0>,
+    a1: ArgReg<'_, A1>,
+    a2: ArgReg<'_, A2>,
+    a3: ArgReg<'_, A3>,
+    a4: ArgReg<'_, A4>,
+    a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+    let r0;
+    asm!(
+        "syscall 0",
+        in("$a7") nr.to_asm(),
+        inlateout("$a0") a0.to_asm() => r0,
+        in("$a1") a1.to_asm(),
+        in("$a2") a2.to_asm(),
+        in("$a3") a3.to_asm(),
+        in("$a4") a4.to_asm(),
+        in("$a5") a5.to_asm(),
+        options(nostack, preserves_flags)
+    );
+    FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6_readonly(
+    nr: SyscallNumber<'_>,
+    a0: ArgReg<'_, A0>,
+    a1: ArgReg<'_, A1>,
+    a2: ArgReg<'_, A2>,
+    a3: ArgReg<'_, A3>,
+    a4: ArgReg<'_, A4>,
+    a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+    let r0;
+    asm!(
+        "syscall 0",
+        in("$a7") nr.to_asm(),
+        inlateout("$a0") a0.to_asm() => r0,
+        in("$a1") a1.to_asm(),
+        in("$a2") a2.to_asm(),
+        in("$a3") a3.to_asm(),
+        in("$a4") a4.to_asm(),
+        in("$a5") a5.to_asm(),
+        options(nostack, preserves_flags, readonly)
+    );
+    FromAsm::from_asm(r0)
+}
diff --git a/src/backend/linux_raw/arch/inline/mod.rs b/src/backend/linux_raw/arch/inline/mod.rs
@@ -7,6 +7,7 @@
 #[cfg_attr(target_arch = "aarch64", path = "aarch64.rs")]
 #[cfg_attr(all(target_arch = "arm", not(thumb_mode)), path = "arm.rs")]
 #[cfg_attr(all(target_arch = "arm", thumb_mode), path = "thumb.rs")]
+#[cfg_attr(target_arch = "loongarch64", path = "loongarch64.rs")]
 #[cfg_attr(target_arch = "mips", path = "mips.rs")]
 #[cfg_attr(target_arch = "mips64", path = "mips64.rs")]
 #[cfg_attr(target_arch = "powerpc64", path = "powerpc64.rs")]

diff --git a/src/backend/linux_raw/arch/mod.rs b/src/backend/linux_raw/arch/mod.rs
@@ -30,6 +30,7 @@ pub(in crate::backend) mod asm;
 #[cfg(any(
     target_arch = "arm",
     target_arch = "aarch64",
+    target_arch = "loongarch64",
     target_arch = "mips",
     target_arch = "mips64",
     target_arch = "powerpc64",