Swap Channel type params, erase dma channel

esp-hal/CHANGELOG.md

@@ -64,6 +64,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - I2c `transaction` is now also available as a inherent function, lift size limit on `write`,`read` and `write_read` (#2262)
 - SPI transactions are now cancelled if the transfer object (or async Future) is dropped. (#2216)
 - The DMA channel types have been removed from peripherals (#2261)
+- The channel type parameter of `dma::Channel` have been moved to the last position and can be erased using `degrade()` (#2261)
 
 ### Fixed
 

esp-hal/MIGRATING-0.20.md

@@ -340,6 +340,15 @@ A non-exhausitve list demonstrating this change:
 +SpiDma<'static, esp_hal::peripherals::SPI2, HalfDuplexMode, Blocking>
 ```
 
-You can now call `dma_channel.degrade()` to obtain a type-erased version of `Channel`. Note that
-on ESP32 and ESP32-S2, passing this channel to an incompatible peripheral (for example an
+The type parameters of `Channel` have been reordered. The channel type
+has been moved to the last position. For example:
+
+```diff
+-Channel<'d, DmaChannel0, Async>
++Channel<'d, Async, DmaChannel0>
+```
+
+You can now call `dma_channel.degrade()` to obtain a type-erased version of `Channel`. You
+don't have to spell out `Channel<'d, Mode, AnyDmaChannel>`, you can use `Channel<'d, Mode>` instead.
+Note that on ESP32 and ESP32-S2, passing this channel to an incompatible peripheral (for example an
 I2S-specific DMA channel to SPI) will result in a panic.

esp-hal/src/aes/mod.rs

@@ -235,7 +235,6 @@ pub mod dma {
         aes::{Key, Mode},
         dma::{
             dma_private::{DmaSupport, DmaSupportRx, DmaSupportTx},
-            AnyDmaChannel,
             Channel,
             ChannelRx,
             ChannelTx,
@@ -274,7 +273,7 @@ pub mod dma {
         /// The underlying [`Aes`](super::Aes) driver
         pub aes: super::Aes<'d>,
 
-        channel: Channel<'d, AnyDmaChannel, crate::Blocking>,
+        channel: Channel<'d, crate::Blocking>,
         rx_chain: DescriptorChain,
         tx_chain: DescriptorChain,
     }
@@ -283,7 +282,7 @@ pub mod dma {
         /// Enable DMA for the current instance of the AES driver
         pub fn with_dma<C>(
             self,
-            channel: Channel<'d, C, crate::Blocking>,
+            channel: Channel<'d, crate::Blocking, C>,
             rx_descriptors: &'static mut [DmaDescriptor],
             tx_descriptors: &'static mut [DmaDescriptor],
         ) -> AesDma<'d>
@@ -323,7 +322,7 @@ pub mod dma {
     }
 
     impl<'d> DmaSupportTx for AesDma<'d> {
-        type TX = ChannelTx<'d, AnyDmaChannel>;
+        type TX = ChannelTx<'d>;
 
         fn tx(&mut self) -> &mut Self::TX {
             &mut self.channel.tx
@@ -335,7 +334,7 @@ pub mod dma {
     }
 
     impl<'d> DmaSupportRx for AesDma<'d> {
-        type RX = ChannelRx<'d, AnyDmaChannel>;
+        type RX = ChannelRx<'d>;
 
         fn rx(&mut self) -> &mut Self::RX {
             &mut self.channel.rx

esp-hal/src/dma/gdma.rs

@@ -428,7 +428,7 @@ impl DmaChannel for AnyDmaChannel {
     }
 }
 
-impl<CH: DmaChannel, M: Mode> Channel<'_, CH, M> {
+impl<CH: DmaChannel, M: Mode> Channel<'_, M, CH> {
     /// Asserts that the channel is compatible with the given peripheral.
     pub fn runtime_ensure_compatible<P: PeripheralMarker + DmaEligible>(
         &self,
@@ -490,7 +490,7 @@ macro_rules! impl_channel {
                     self,
                     burst_mode: bool,
                     priority: DmaPriority,
-                ) -> crate::dma::Channel<'a, [<DmaChannel $num>], M> {
+                ) -> crate::dma::Channel<'a, M, [<DmaChannel $num>]> {
                     let tx_impl = ChannelTxImpl(SpecificGdmaChannel::<$num> {});
                     tx_impl.set_burst_mode(burst_mode);
                     tx_impl.set_priority(priority);
@@ -517,7 +517,7 @@ macro_rules! impl_channel {
                     self,
                     burst_mode: bool,
                     priority: DmaPriority,
-                ) -> crate::dma::Channel<'a, [<DmaChannel $num>], crate::Blocking> {
+                ) -> crate::dma::Channel<'a, crate::Blocking, [<DmaChannel $num>]> {
                     self.do_configure(burst_mode, priority)
                 }
 
@@ -529,7 +529,7 @@ macro_rules! impl_channel {
                     self,
                     burst_mode: bool,
                     priority: DmaPriority,
-                ) -> crate::dma::Channel<'a, [<DmaChannel $num>], $crate::Async> {
+                ) -> crate::dma::Channel<'a, $crate::Async, [<DmaChannel $num>]> {
                     let this = self.do_configure(burst_mode, priority);
 
                     [<DmaChannel $num>]::set_isr($async_handler);
@@ -648,7 +648,7 @@ mod m2m {
     where
         M: Mode,
     {
-        channel: Channel<'d, AnyDmaChannel, M>,
+        channel: Channel<'d, M>,
         rx_chain: DescriptorChain,
         tx_chain: DescriptorChain,
         peripheral: DmaPeripheral,
@@ -660,7 +660,7 @@ mod m2m {
     {
         /// Create a new Mem2Mem instance.
         pub fn new<CH>(
-            channel: Channel<'d, CH, M>,
+            channel: Channel<'d, M, CH>,
             peripheral: impl DmaEligible,
             rx_descriptors: &'static mut [DmaDescriptor],
             tx_descriptors: &'static mut [DmaDescriptor],
@@ -681,7 +681,7 @@ mod m2m {
 
         /// Create a new Mem2Mem instance with specific chunk size.
         pub fn new_with_chunk_size<CH>(
-            channel: Channel<'d, CH, M>,
+            channel: Channel<'d, M, CH>,
             peripheral: impl DmaEligible,
             rx_descriptors: &'static mut [DmaDescriptor],
             tx_descriptors: &'static mut [DmaDescriptor],
@@ -708,7 +708,7 @@ mod m2m {
         /// You must ensure that your not using DMA for the same peripheral and
         /// that your the only one using the DmaPeripheral.
         pub unsafe fn new_unsafe<CH>(
-            channel: Channel<'d, CH, M>,
+            channel: Channel<'d, M, CH>,
             peripheral: DmaPeripheral,
             rx_descriptors: &'static mut [DmaDescriptor],
             tx_descriptors: &'static mut [DmaDescriptor],

esp-hal/src/dma/mod.rs

@@ -1591,7 +1591,7 @@ pub trait Rx: crate::private::Sealed {
 // DMA receive channel
 #[non_exhaustive]
 #[doc(hidden)]
-pub struct ChannelRx<'a, CH>
+pub struct ChannelRx<'a, CH = AnyDmaChannel>
 where
     CH: DmaChannel,
 {
@@ -1613,7 +1613,7 @@ where
     }
 
     /// Return a type-erased (degraded) version of this channel.
-    pub fn degrade(self) -> ChannelRx<'a, AnyDmaChannel> {
+    pub fn degrade(self) -> ChannelRx<'a> {
         ChannelRx {
             burst_mode: self.burst_mode,
             rx_impl: CH::degrade_rx(self.rx_impl),
@@ -1804,7 +1804,7 @@ pub trait Tx: crate::private::Sealed {
 
 /// DMA transmit channel
 #[doc(hidden)]
-pub struct ChannelTx<'a, CH>
+pub struct ChannelTx<'a, CH = AnyDmaChannel>
 where
     CH: DmaChannel,
 {
@@ -1827,7 +1827,7 @@ where
     }
 
     /// Return a type-erased (degraded) version of this channel.
-    pub fn degrade(self) -> ChannelTx<'a, AnyDmaChannel> {
+    pub fn degrade(self) -> ChannelTx<'a> {
         ChannelTx {
             burst_mode: self.burst_mode,
             tx_impl: CH::degrade_tx(self.tx_impl),
@@ -2027,7 +2027,7 @@ pub trait InterruptAccess<T: EnumSetType>: crate::private::Sealed {
 }
 
 /// DMA Channel
-pub struct Channel<'d, CH, MODE>
+pub struct Channel<'d, MODE, CH = AnyDmaChannel>
 where
     CH: DmaChannel,
     MODE: Mode,
@@ -2039,7 +2039,7 @@ where
     phantom: PhantomData<MODE>,
 }
 
-impl<'d, C> Channel<'d, C, crate::Blocking>
+impl<'d, C> Channel<'d, crate::Blocking, C>
 where
     C: DmaChannel,
 {
@@ -2097,13 +2097,13 @@ where
     }
 }
 
-impl<'d, C, M: Mode> Channel<'d, C, M>
+impl<'d, C, M: Mode> Channel<'d, M, C>
 where
     C: DmaChannel,
 {
     /// Return a type-erased (degraded) version of this channel (both rx and
     /// tx).
-    pub fn degrade(self) -> Channel<'d, AnyDmaChannel, M> {
+    pub fn degrade(self) -> Channel<'d, M> {
         Channel {
             rx: self.rx.degrade(),
             tx: self.tx.degrade(),

esp-hal/src/dma/pdma.rs

@@ -417,7 +417,7 @@ macro_rules! ImplSpiChannel {
                     self,
                     burst_mode: bool,
                     priority: DmaPriority,
-                ) -> Channel<'a, [<Spi $num DmaChannel>], M> {
+                ) -> Channel<'a, M, [<Spi $num DmaChannel>]> {
                     #[cfg(esp32)]
                     {
                         // (only) on ESP32 we need to configure DPORT for the SPI DMA channels
@@ -450,7 +450,7 @@ macro_rules! ImplSpiChannel {
                     self,
                     burst_mode: bool,
                     priority: DmaPriority,
-                ) -> Channel<'a, [<Spi $num DmaChannel>], $crate::Blocking> {
+                ) -> Channel<'a, $crate::Blocking, [<Spi $num DmaChannel>]> {
                     Self::do_configure(self, burst_mode, priority)
                 }
 
@@ -462,7 +462,7 @@ macro_rules! ImplSpiChannel {
                     self,
                     burst_mode: bool,
                     priority: DmaPriority,
-                ) -> Channel<'a, [<Spi $num DmaChannel>], $crate::Async> {
+                ) -> Channel<'a, $crate::Async, [<Spi $num DmaChannel>]> {
                     let this = Self::do_configure(self, burst_mode, priority);
 
                     [<Spi $num DmaChannel>]::set_isr(super::asynch::interrupt::[< interrupt_handler_spi $num _dma >]);
@@ -860,7 +860,7 @@ macro_rules! ImplI2sChannel {
                     self,
                     burst_mode: bool,
                     priority: DmaPriority,
-                ) -> Channel<'a, [<I2s $num DmaChannel>], M> {
+                ) -> Channel<'a, M, [<I2s $num DmaChannel>]> {
                     let tx_impl = I2sDmaTxChannelImpl([<I2s $num DmaChannel>] {});
                     tx_impl.set_burst_mode(burst_mode);
                     tx_impl.set_priority(priority);
@@ -884,7 +884,7 @@ macro_rules! ImplI2sChannel {
                     self,
                     burst_mode: bool,
                     priority: DmaPriority,
-                ) -> Channel<'a, [<I2s $num DmaChannel>], $crate::Blocking> {
+                ) -> Channel<'a, $crate::Blocking, [<I2s $num DmaChannel>]> {
                     Self::do_configure(self, burst_mode, priority)
                 }
 
@@ -896,7 +896,7 @@ macro_rules! ImplI2sChannel {
                     self,
                     burst_mode: bool,
                     priority: DmaPriority,
-                ) -> Channel<'a, [<I2s $num DmaChannel>], $crate::Async> {
+                ) -> Channel<'a, $crate::Async, [<I2s $num DmaChannel>]> {
                     let this = Self::do_configure(self, burst_mode, priority);
 
                     [<I2s $num DmaChannel>]::set_isr(super::asynch::interrupt::[< interrupt_handler_i2s $num >]);
@@ -1072,9 +1072,9 @@ impl TxRegisterAccess for AnyPdmaTxChannelImpl {
     }
 }
 
-impl<'d, C, M: Mode> Channel<'d, C, M>
+impl<'d, CH, M: Mode> Channel<'d, M, CH>
 where
-    C: DmaChannel,
+    CH: DmaChannel,
 {
     /// Asserts that the channel is compatible with the given peripheral.
     pub fn runtime_ensure_compatible(&self, peripheral: &PeripheralRef<'_, impl PeripheralMarker>) {

esp-hal/src/i2s.rs

@@ -87,7 +87,6 @@ use private::*;
 use crate::{
     dma::{
         dma_private::{DmaSupport, DmaSupportRx, DmaSupportTx},
-        AnyDmaChannel,
         Channel,
         ChannelRx,
         ChannelTx,
@@ -338,7 +337,7 @@ where
         standard: Standard,
         data_format: DataFormat,
         sample_rate: impl Into<fugit::HertzU32>,
-        channel: Channel<'d, CH, DmaMode>,
+        channel: Channel<'d, DmaMode, CH>,
         rx_descriptors: &'static mut [DmaDescriptor],
         tx_descriptors: &'static mut [DmaDescriptor],
     ) -> Self {
@@ -437,7 +436,7 @@ where
         standard: Standard,
         data_format: DataFormat,
         sample_rate: impl Into<fugit::HertzU32>,
-        channel: Channel<'d, CH, DmaMode>,
+        channel: Channel<'d, DmaMode, CH>,
         rx_descriptors: &'static mut [DmaDescriptor],
         tx_descriptors: &'static mut [DmaDescriptor],
     ) -> Self
@@ -473,7 +472,7 @@ where
     T: RegisterAccess,
 {
     register_access: PhantomData<T>,
-    tx_channel: ChannelTx<'d, AnyDmaChannel>,
+    tx_channel: ChannelTx<'d>,
     tx_chain: DescriptorChain,
     phantom: PhantomData<DmaMode>,
 }
@@ -507,7 +506,7 @@ where
     T: RegisterAccess,
     DmaMode: Mode,
 {
-    type TX = ChannelTx<'d, AnyDmaChannel>;
+    type TX = ChannelTx<'d>;
 
     fn tx(&mut self) -> &mut Self::TX {
         &mut self.tx_channel
@@ -523,10 +522,7 @@ where
     T: RegisterAccess,
     DmaMode: Mode,
 {
-    fn new(
-        tx_channel: ChannelTx<'d, AnyDmaChannel>,
-        descriptors: &'static mut [DmaDescriptor],
-    ) -> Self {
+    fn new(tx_channel: ChannelTx<'d>, descriptors: &'static mut [DmaDescriptor]) -> Self {
         Self {
             register_access: PhantomData,
             tx_channel,
@@ -640,7 +636,7 @@ where
     DmaMode: Mode,
 {
     register_access: PhantomData<T>,
-    rx_channel: ChannelRx<'d, AnyDmaChannel>,
+    rx_channel: ChannelRx<'d>,
     rx_chain: DescriptorChain,
     phantom: PhantomData<DmaMode>,
 }
@@ -674,7 +670,7 @@ where
     T: RegisterAccess,
     DmaMode: Mode,
 {
-    type RX = ChannelRx<'d, AnyDmaChannel>;
+    type RX = ChannelRx<'d>;
 
     fn rx(&mut self) -> &mut Self::RX {
         &mut self.rx_channel
@@ -690,10 +686,7 @@ where
     T: RegisterAccess,
     DmaMode: Mode,
 {
-    fn new(
-        rx_channel: ChannelRx<'d, AnyDmaChannel>,
-        descriptors: &'static mut [DmaDescriptor],
-    ) -> Self {
+    fn new(rx_channel: ChannelRx<'d>, descriptors: &'static mut [DmaDescriptor]) -> Self {
         Self {
             register_access: PhantomData,
             rx_channel,
@@ -832,15 +825,7 @@ mod private {
     #[cfg(any(esp32, esp32s3))]
     use crate::peripherals::{i2s1::RegisterBlock, I2S1};
     use crate::{
-        dma::{
-            AnyDmaChannel,
-            ChannelRx,
-            ChannelTx,
-            DmaDescriptor,
-            DmaEligible,
-            DmaPeripheral,
-            PeripheralMarker,
-        },
+        dma::{ChannelRx, ChannelTx, DmaDescriptor, DmaEligible, DmaPeripheral, PeripheralMarker},
         gpio::{InputSignal, OutputSignal, PeripheralInput, PeripheralOutput},
         interrupt::InterruptHandler,
         into_ref,
@@ -856,7 +841,7 @@ mod private {
         DmaMode: Mode,
     {
         pub register_access: PhantomData<T>,
-        pub tx_channel: ChannelTx<'d, AnyDmaChannel>,
+        pub tx_channel: ChannelTx<'d>,
         pub descriptors: &'static mut [DmaDescriptor],
         pub(crate) phantom: PhantomData<DmaMode>,
     }
@@ -910,7 +895,7 @@ mod private {
         DmaMode: Mode,
     {
         pub register_access: PhantomData<T>,
-        pub rx_channel: ChannelRx<'d, AnyDmaChannel>,
+        pub rx_channel: ChannelRx<'d>,
         pub descriptors: &'static mut [DmaDescriptor],
         pub(crate) phantom: PhantomData<DmaMode>,
     }