HammerBlade Manycore Accelerator

CMakeLists.txt

@@ -100,6 +100,7 @@ add_library(dromajo_cosim STATIC
         src/dromajo_main.cpp
         src/dromajo_cosim.cpp
         src/riscv_cpu.cpp
+        src/dromajo_manycore.cpp
         )
 
 # add librt for Linux

include/dromajo_manycore.h

@@ -0,0 +1,129 @@
+/*
+ * dromajo_manycore.h
+ * API definitons for Dromajo/BlackParrot to interact with the Manycore
+ */
+
+#ifndef DROMAJO_MANYCORE_H
+#define DROMAJO_MANYCORE_H 1
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <xmmintrin.h>
+
+#include <vector>
+#include <queue>
+#include <map>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define RW_FAIL_CODE 0xFFFFFFFF
+
+// All 128-bit FIFOs can have a maximum of N elements each
+#ifndef FIFO_MAX_ELEMENTS
+#error FIFO_MAX_ELEMENTS not defined
+#endif
+
+// NOTE: The host does not respond to the manycore
+
+typedef union mc_pkt_t {
+  // 128-bit packet sent/received over the DPI
+  __m128i pkt128;
+  // 4 32-bit packets to send to dromajo manycore FIFOs
+  uint32_t pkt32[4];
+} mc_pkt_t;
+
+typedef enum mc_fifo_type_t {
+  FIFO_HOST_TO_MC_REQ = 0,
+  FIFO_MC_TO_HOST_REQ = 1,
+  FIFO_MC_TO_HOST_RESP = 2
+} mc_fifo_type_t;
+
+// All FIFOs are N element FIFOs. These aim to mimic the SIPOs and PISOs in the manycore bridge hardware
+typedef struct mc_fifo_t {
+  // 4 32-bit FIFOs to capture the 128-bit manycore packets
+  std::vector<std::queue<uint32_t>> fifo;
+  // Is this FIFO initialized?
+  bool init;
+  // Is the FIFO full? If all FIFOs are full, the 128-bit FIFO output is considered "valid".
+  // A "valid" output can then be transmitted to the manycore or read by BP
+  std::vector<bool> full;
+  // Number of credits for FIFOs on the BP->MC request path; Unused otherwise
+  int credits;
+} mc_fifo_t;
+
+// Define the 128-bit FIFOs
+extern mc_fifo_t *host_to_mc_req_fifo;
+extern mc_fifo_t *mc_to_host_req_fifo;
+extern mc_fifo_t *mc_to_host_resp_fifo;
+
+// FIFO ID --> FIFO Index map
+static std::map<uint32_t, int> index_map {{0x0, 0}, {0x4, 1}, {0x8, 2}, {0xc, 3}};
+
+/***************************** Manycore FIFO API *****************************/
+
+/*
+ * Initializes all FIFOs
+ * @param[in] type - Type of the FIFO to initialize
+ */
+void mc_fifo_init(mc_fifo_t *fifo);
+
+/*
+ * Returns if the FIFO is full
+ * A 0 indicates the FIFO is not full
+ * A 1 indicates the FIFO is full
+ * @param[in] type - Type of FIFO to query
+ * @param[in] _full - Set to true if you need the fullness of a specific 32-bit FIFO
+ * @param[in] fifo_id - Chooses which 32-bit FIFO's fullness to return
+ * @returns FIFO full status
+ */
+bool mc_is_fifo_full(mc_fifo_type_t type, bool _full = false, uint32_t fifo_id = 0x0);
+
+/*
+ * Returns if the FIFO is empty
+ * A 0 indicates the FIFO is not empty
+ * A 1 indicates the FIFO is empty
+ * @param[in] type - Type of FIFO to query
+ * @param[in] _full - Set to true if you need the fullness of a specific 32-bit FIFO
+ * @param[in] fifo_id - Chooses which 32-bit FIFO's fullness to return
+ * @returns FIFO empty status
+ */
+bool mc_is_fifo_empty(mc_fifo_type_t type, bool _empty = false, uint32_t fifo_id = 0x0);
+
+/*
+ * Write to the desired FIFO
+ * @param[in] type - Type of FIFO to write
+ * @param[in] fifo_id - Chooses which 32-bit FIFO to write
+ * @param[in] val - The 32-bit value to be written
+ * @return FIFO write status
+ *  false --> Write was unsuccesful
+ *  true --> Write was successful
+ */
+bool mc_fifo_write(mc_fifo_type_t type, uint32_t fifo_id, uint32_t val);
+
+/*
+ * Read from the desired FIFO
+ * @param[in] offset - Chooses which 32-bit FIFO to read
+ * @param[in] val - Pointer to store the 32-bit read value 
+ * @param[in] type - Type of FIFO to read
+ * @return FIFO read status
+ *  false --> Read was unsuccesful
+ *  true --> Read was successful
+ */
+bool mc_fifo_read(mc_fifo_type_t type, uint32_t offset, uint32_t *val);
+
+/*
+ * Get the credits for the desired FIFO
+ * Only BP will request the manycore for credits
+ * @params[in] type - Type of FIFO requesting credits
+ * @returns the remaining FIFO credits
+ */
+int mc_fifo_get_credits(mc_fifo_type_t type);
+
+#ifdef __cplusplus
+}  // extern C
+#endif
+
+#endif

include/machine.h

@@ -191,6 +191,9 @@ typedef struct {
     /* Enable BlackParrot Host */
     bool host;
 
+    /* Enable HammerBlade Manycore as accelerator */
+    bool manycore;
+
     /* Periodically create checkpoints */
     uint64_t checkpoint_period;
 

include/riscv_machine.h

@@ -117,6 +117,9 @@ struct RISCVMachine {
     /* Enable BlackParrot Host */
     bool host;
 
+    /* Enable HammerBlade Manycore Accelerator */
+    bool manycore;
+
     /* Periodically create checkpoints */
     uint64_t checkpoint_period;
 };
@@ -133,6 +136,18 @@ struct RISCVMachine {
 #define HOST_PUTCHAR   0x1000
 #define HOST_FINISH    0x2000
 
+#define MANYCORE_BASE_ADDR              0x00500000
+#define MANYCORE_SIZE                   0x00100000
+#define MANYCORE_HOST_REQ_FIFO_ADDR     0x01000
+#define MANYCORE_HOST_REQ_CREDITS_ADDR  0x02000
+#define MANYCORE_HOST_REQ_ENTRIES_ADDR  0x03000
+#define MANYCORE_MC_RESP_FIFO_ADDR      0x04000
+#define MANYCORE_MC_RESP_ENTRIES_ADDR   0x05000
+#define MANYCORE_MC_REQ_FIFO_ADDR       0x06000
+#define MANYCORE_MC_REQ_ENTRIES_ADDR    0x07000
+#define MANYCORE_ROM_START_ADDR         0x08000
+#define MANYCORE_ROM_END_ADDR           0x08fff
+
 #define OFFSET_MASK  0x00000FFFFF
 #define DEVICE_MASK  0x0000F00000
 #define CORE_MASK    0xFFFF000000

src/dromajo_main.cpp

@@ -567,6 +567,7 @@ static void usage(const char *prog, const char *msg) {
             "       --custom_extension add X extension to isa\n"
             "       --enable_amo enables atomic instructions\n"
             "       --host enable BlackParrot host\n"
+            "       --manycore enable HammerBlade Manycore accelerator\n"
             "       --checkpoint_period creates a checkpoint evey N instructions\n",
             "       --clear_ids clear mvendorid, marchid, mimpid for all cores\n",
             msg,
@@ -629,6 +630,7 @@ RISCVMachine *virt_machine_main(int argc, char **argv) {
     bool        custom_extension         = false;
     bool        amo_en                   = false;
     bool        host                     = false;
+    bool        manycore                 = false;
     uint64_t    checkpoint_period        = 0;
     const char *simpoint_file            = 0;
     bool        clear_ids                = false;
@@ -663,6 +665,7 @@ RISCVMachine *virt_machine_main(int argc, char **argv) {
             {"custom_extension",              no_argument, 0,  'u' }, // CFG
             {"enable_amo",                    no_argument, 0,  'a' },
             {"host",                          no_argument, 0,  'h' },
+            {"manycore",                      no_argument, 0,  'H'},
             {"checkpoint_period",       required_argument, 0,  'e' },
             {"clear_ids",                     no_argument, 0,  'L' }, // CFG
             {0,                         0,                 0,  0 }
@@ -825,6 +828,8 @@ RISCVMachine *virt_machine_main(int argc, char **argv) {
 
             case 'h': host = true; break;
 
+            case 'H': manycore = true; break;
+
             case 'e':
                 if(checkpoint_period)
                     usage(prog, "already had a checkpoint period");
@@ -1011,6 +1016,9 @@ RISCVMachine *virt_machine_main(int argc, char **argv) {
     // BlackParrot Host
     p->host = host;
 
+    // HammerBlade Manycore Accelerator
+    p->manycore = manycore;
+
     // Checkpoint Period
     p->checkpoint_period = checkpoint_period;