GitHub - arpanvyas/FPGA-Ethernet-Communication: An Ethernet based communication interface between two FPGAs through hardware description on VHDL and Verilog.

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An Ethernet based communication interface between two FPGAs through hardware description on VHDL and Verilog.

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Name		Name	Last commit message	Last commit date
Latest commit History 5 Commits
System		System
README.txt		README.txt

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An Ethernet based communication interface between two FPGAs through hardware description
on VHDL and Verilog. The UDP, IP, Ethernet, ARP and DHCP protocols are used for data flow and control over the
subnet.

Each folder has the top module till that folder and a testbench till that module (if exists).
System consists of complete : FPGA1, FPGA2, DHCP, Switch
The System module is in itself a testbench connecting all four entities.