TEMP: recompile Portenta core

arduino · Aug 24, 2022 · 2a2a278 · 2a2a278
1 parent 687a943
commit 2a2a278
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Showing 7 changed files with 13 additions and 12 deletions.
diff --git a/variants/PORTENTA_H7_M7/cflags.txt b/variants/PORTENTA_H7_M7/cflags.txt
@@ -3,12 +3,12 @@
 -DAPPLICATION_ADDR=0x8040000
 -DAPPLICATION_RAM_ADDR=0x24000000
 -DAPPLICATION_RAM_SIZE=0x80000
--DAPPLICATION_SIZE=0xc0000
+-DAPPLICATION_SIZE=0x1c0000
 -DMBED_RAM1_SIZE=0x80000
 -DMBED_RAM1_START=0x24000000
 -DMBED_RAM_SIZE=0x80000
 -DMBED_RAM_START=0x24000000
--DMBED_ROM_SIZE=0x100000
+-DMBED_ROM_SIZE=0x200000
 -DMBED_ROM_START=0x8000000
 -DMBED_TRAP_ERRORS_ENABLED=1
 -Os

diff --git a/variants/PORTENTA_H7_M7/cxxflags.txt b/variants/PORTENTA_H7_M7/cxxflags.txt
@@ -5,12 +5,12 @@
 -DAPPLICATION_ADDR=0x8040000
 -DAPPLICATION_RAM_ADDR=0x24000000
 -DAPPLICATION_RAM_SIZE=0x80000
--DAPPLICATION_SIZE=0xc0000
+-DAPPLICATION_SIZE=0x1c0000
 -DMBED_RAM1_SIZE=0x80000
 -DMBED_RAM1_START=0x24000000
 -DMBED_RAM_SIZE=0x80000
 -DMBED_RAM_START=0x24000000
--DMBED_ROM_SIZE=0x100000
+-DMBED_ROM_SIZE=0x200000
 -DMBED_ROM_START=0x8000000
 -DMBED_TRAP_ERRORS_ENABLED=1
 -Os

diff --git a/variants/PORTENTA_H7_M7/defines.txt b/variants/PORTENTA_H7_M7/defines.txt
@@ -44,8 +44,9 @@
 -DEXTRA_IDLE_STACK_REQUIRED
 -DFEATURE_BLE=1
 -D__FPU_PRESENT=1
+-DLSE_STARTUP_TIMEOUT=200
 -D__MBED__=1
--DMBED_BUILD_TIMESTAMP=1657634193.764244
+-DMBED_BUILD_TIMESTAMP=1661346223.3493464
 -D__MBED_CMSIS_RTOS_CM
 -DMBED_TICKLESS
 -DMBEDTLS_FS_IO
@@ -82,7 +83,7 @@
 -DUSE_HAL_DRIVER
 -DVIRTIO_MASTER_ONLY
 -DMBED_NO_GLOBAL_USING_DIRECTIVE=1
--DCORE_MAJOR=3
--DCORE_MINOR=2
--DCORE_PATCH=0
+-DCORE_MAJOR=
+-DCORE_MINOR=
+-DCORE_PATCH=
 -DUSE_ARDUINO_PINOUT
diff --git a/variants/PORTENTA_H7_M7/ldflags.txt b/variants/PORTENTA_H7_M7/ldflags.txt
@@ -1,11 +1,11 @@
--DMBED_APP_SIZE=0xc0000
+-DMBED_APP_SIZE=0x1c0000
 -DMBED_APP_START=0x8040000
 -DMBED_BOOT_STACK_SIZE=1024
 -DMBED_RAM1_SIZE=0x80000
 -DMBED_RAM1_START=0x24000000
 -DMBED_RAM_SIZE=0x80000
 -DMBED_RAM_START=0x24000000
--DMBED_ROM_SIZE=0x100000
+-DMBED_ROM_SIZE=0x200000
 -DMBED_ROM_START=0x8000000
 -DXIP_ENABLE=0
 -Wl,--gc-sections

diff --git a/variants/PORTENTA_H7_M7/libs/libmbed.a b/variants/PORTENTA_H7_M7/libs/libmbed.a
diff --git a/variants/PORTENTA_H7_M7/linker_script.ld b/variants/PORTENTA_H7_M7/linker_script.ld
@@ -1,6 +1,6 @@
 MEMORY
 {
-  FLASH (rx) : ORIGIN = 0x8040000, LENGTH = CM4_BINARY_START - 0x8040000
+  FLASH (rx) : ORIGIN = 0x8040000, LENGTH = 0x1c0000
   DTCMRAM (rwx) : ORIGIN = 0x20000000 + (((166 * 4) + 7) & 0xFFFFFFF8), LENGTH = 128K - (((166 * 4) + 7) & 0xFFFFFFF8)
   RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 0x80000
   RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K

diff --git a/variants/PORTENTA_H7_M7/mbed_config.h b/variants/PORTENTA_H7_M7/mbed_config.h
@@ -382,7 +382,7 @@
 #define MBED_CONF_TARGET_LPTICKER_LPTIM                                         1                                                                                                // set by target:MCU_STM32H7
 #define MBED_CONF_TARGET_LPTICKER_LPTIM_CLOCK                                   1                                                                                                // set by target:MCU_STM32
 #define MBED_CONF_TARGET_LPUART_CLOCK_SOURCE                                    USE_LPUART_CLK_LSE|USE_LPUART_CLK_PCLK1|USE_LPUART_CLK_PCLK3                                     // set by target:MCU_STM32
-#define MBED_CONF_TARGET_LSE_AVAILABLE                                          0                                                                                                // set by target:PORTENTA_H7
+#define MBED_CONF_TARGET_LSE_AVAILABLE                                          1                                                                                                // set by target:PORTENTA_H7
 #define MBED_CONF_TARGET_LSE_BYPASS                                             1                                                                                                // set by target:PORTENTA_H7
 #define MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL                                   RCC_LSEDRIVE_LOW                                                                                 // set by target:MCU_STM32H7
 #define MBED_CONF_TARGET_MPU_ROM_END                                            0x0fffffff                                                                                       // set by target:Target