Merge pull request #55 from apollo-lhc/develop

merge to master for tag

.ipbb_setup.yml

@@ -2,7 +2,11 @@ init:
   - make init
   - make list 
   - make prebuild_EMP_Cornell_rev1_p2_VU7p-1-SM_7s
+  - make address_table_EMP_Cornell_rev1_p2_VU7p-1-SM_7s
   - make prebuild_EMP_Cornell_rev2_p1_VU13p-1-SM_USP
+  - make address_table_EMP_Cornell_rev2_p1_VU13p-1-SM_USP
+  - make prebuild_EMP_Cornell_rev2_p2_VU13p-1-SM_USP
+  - make address_table_EMP_Cornell_rev2_p2_VU13p-1-SM_USP
 
 
 reset:

Makefile

@@ -25,7 +25,8 @@ PL_PATH=${MAKE_PATH}/src
 BD_PATH=${MAKE_PATH}/bd
 CORES_PATH=${MAKE_PATH}/cores
 #ADDRESS_TABLE = ${MAKE_PATH}/os/address_table/address_apollo.xml
-$(BIT_BASE)%.bit $(BIT_BASE)%.svf	: ADDRESS_TABLE=${MAKE_PATH}/os/address_table_%/address_%.xml
+#$(BIT_BASE)%.bit $(BIT_BASE)%.svf	: ADDRESS_TABLE=${MAKE_PATH}/os/address_table_%/address_%.xml
+$(BIT_BASE)%.bit $(BIT_BASE)%.svf	: ADDRESS_TABLE=${MAKE_PATH}/kernel/address_table_%/address_%.xml
 ################################################################################
 # Configs
 #################################################################################
@@ -34,7 +35,7 @@ CONFIGS_BASE_PATH=configs/
 CONFIGS=$(patsubst ${CONFIGS_BASE_PATH}%/,%,$(dir $(wildcard ${CONFIGS_BASE_PATH}*/)))
 
 define CONFIGS_template =
- $(1): clean autogen_clean_$(1)
+ $(1): clean autogen_clean_$(1) clean_overlays
 	time $(MAKE) $(BIT_BASE)$$(@).bit || $(MAKE) NOTIFY_DAN_BAD
 endef
 define CONFIGS_autoclean_template =
@@ -166,6 +167,8 @@ $(BIT_BASE)%.bit        : $(ADDRESS_TABLE_CREATION_PATH)config_%.yaml
 	cd proj &&\
 	vivado $(VIVADO_FLAGS) -source $(SETUP_BUILD_TCL) -tclargs ${MAKE_PATH} ${BUILD_SCRIPTS_PATH} $(subst .bit,,$(subst ${BIT_BASE},,$@)) $(OUTPUT_MARKUP)
 	$(MAKE) NOTIFY_DAN_GOOD  $(OUTPUT_MARKUP)
+	@echo   ${MAKE} $(ADDRESS_TABLE_CREATION_PATH)address_tables/address_table_$*/address_apollo.xml
+	${MAKE} $(ADDRESS_TABLE_CREATION_PATH)address_tables/address_table_$*/address_apollo.xml
 	$(MAKE) overlays  $(OUTPUT_MARKUP)
 	@rm -f $*.tar.gz
 	$(MAKE) $*.tar.gz  $(OUTPUT_MARKUP)

configs/EMP_Cornell_rev2_p2_VU13p-1-SM_USP/config.yaml

@@ -0,0 +1,103 @@
+AXI_CONTROL_SETS:
+  AXI_MASTER_CTRL:
+    axi_interconnect: "${::AXI_INTERCONNECT_NAME}"
+    axi_clk: "${::AXI_MASTER_CLK}"
+    axi_rstn: "${::AXI_MASTER_RSTN}"
+    axi_freq: "${::AXI_MASTER_CLK_FREQ}"
+
+
+AXI_SLAVES:
+  F2_IO:
+    TCL_CALL: 
+      command: AXI_PL_DEV_CONNECT
+      axi_control: "${::AXI_MASTER_CTRL}"
+      addr:
+        offset: "0xB3002000"
+        range:  "4K"
+      remote_slave: "1"
+    XML: "address_table/modules/CM_IO.xml"
+    UHAL_BASE: 0xc1000000
+    HDL: 
+      out_name: "IO"
+      map_template: "axi_generic/template_map_withbram.vhd"
+
+      # KH Feb'23
+      # F2_SYS_MGMT:
+      #   TCL_CALL:
+      #     command: AXI_IP_SYS_MGMT
+      #     enable_i2c_pins: 1
+      #     axi_control: "${::AXI_MASTER_CTRL}"
+      #     addr:
+      #       offset: "0xB3001000"
+      #       range: "4K"
+      #     remote_slave: "1"
+      #   XML: "address_table/modules/VIRTEX_SYS_MGMT.xml"
+      #   UHAL_BASE: 0xc0000000
+
+  F2_CM_FW_INFO:
+    TCL_CALL:
+      command: AXI_PL_DEV_CONNECT 
+      axi_control: "${::AXI_MASTER_CTRL}"
+      addr:
+        offset: "0xB3003000"
+        range:  "4K"
+      remote_slave: "1"
+    XML: "address_table/modules/FW_INFO.xml"
+    UHAL_BASE: 0xc2000000
+    HDL: 
+      out_name: "CM_FW_INFO"
+      map_template: "axi_generic/template_map.vhd"
+
+
+  F2_IPBUS:
+    TCL_CALL:
+      command: AXI_PL_DEV_CONNECT 
+      axi_control: "${::AXI_MASTER_CTRL}"
+      type: "AXI4"
+      addr:
+        offset: "0xB2000000"
+        range:  "16M"
+      data_width: "64"
+      remote_slave: "1"
+    XML: "address_table/modules/IPBUS.xml"
+    UHAL_BASE: 0xc5000000    
+
+  F2_C2C_INTF:
+    TCL_CALL: 
+      command: AXI_PL_DEV_CONNECT
+      axi_control: "${::AXI_MASTER_CTRL}"
+      addr:
+        offset: "0xB3010000"
+        range:  "64K"
+      remote_slave: "1"
+    XML: "address_table/modules/C2C_INTFS.xml"
+    UHAL_BASE: 0xc6000000
+    HDL: 
+      out_name: "C2C_INTF"
+      map_template: "axi_generic/template_map_withbram.vhd"
+    SUB_SLAVES:
+      CM1_PB_UART:
+        TCL_CALL:
+          command: "AXI_IP_UART"
+          addr:
+            offset: "0xB3008000"
+            range:  "4K"
+          irq_port: "F2_C2CB/axi_c2c_s2m_intr_in"
+          baud_rate: "115200"  
+          axi_control: "${::AXI_MASTER_CTRL}"
+          manual_load_dtsi: "1"
+          remote_slave: "1"
+          dt_data: "compatible = \"xlnx,axi-uartlite-2.0\", \"xlnx,xps-uartlite-1.00.a\";current-speed = <115200>;device_type = \"serial\";interrupt-names = \"interrupt\";interrupt-parent = <&IRQ0_INTR_CTRL>;interrupts = <4 0>;port-number = <101>;xlnx,baudrate = <0x1c200>;xlnx,data-bits = <0x8>;xlnx,odd-parity = <0x0>;xlnx,s-axi-aclk-freq-hz-d = \"49.9995\";xlnx,use-parity = <0x0>;
+    "
+
+CORES:
+  onboardclk:
+    TCL_CALL:
+      command: BuildClockWizard
+      in_clk_type: Differential_clock_capable_pin
+      in_clk_freq_MHZ: 200
+      out_clks:
+        1: 200
+        2: 50
+
+

configs/EMP_Cornell_rev2_p2_VU13p-1-SM_USP/files_emp.dep

@@ -0,0 +1,46 @@
+setup ../../../../src/c2cBD/createC2CSlaveInterconnect.tcl
+setup -c emp-fwk:boards/apollo/common ../cfg/apollo_set_paths.tcl
+
+
+
+src ../../src/sub_module.vhd 
+
+
+src ../../../../src/misc/pacd.vhd 
+src ../../../../src/misc/types.vhd 
+src ../../../../src/misc/capture_CDC.vhd 
+src ../../../../src/misc/rate_counter.vhd 
+src ../../../../src/misc/counter.vhd 
+src ../../../../src/misc/capture_CDC.vhd 
+src ../../../../src/misc/uart.vhd 
+
+src ../../../../src/RGB_PWM.vhd 
+src ../../../../src/LED_PWM.vhd   
+
+src ../../../../regmap_helper/axiReg/axiRegWidthPkg_32.vhd
+src ../../../../regmap_helper/axiReg/axiRegPkg_d64.vhd 
+src ../../../../regmap_helper/axiReg/axiRegPkg.vhd 
+src ../../../../regmap_helper/axiReg/axiReg.vhd 
+src ../../../../regmap_helper/axiReg/axiRegBlocking.vhd
+src ../../../../regmap_helper/axiReg/bramPortPkg.vhd
+
+src ../../../../src/C2C_INTF/CM_phy_lane_control.vhd
+src ../../../../src/C2C_INTF/picoblaze/uC.vhd
+src ../../../../src/C2C_INTF/picoblaze/kcpsm6.vhd
+src ../../../../src/C2C_INTF/picoblaze/uart_tx6.vhd
+src ../../../../src/C2C_INTF/picoblaze/uart_rx6.vhd
+src ../../../../src/C2C_INTF/picoblaze/picoblaze/cli.vhd
+src ../../../../src/C2C_INTF/C2C_Intf.vhd
+
+src ../../../../src/CM_FW_info/CM_FW_info.vhd
+
+src ../../autogen/CM_FW_INFO/CM_FW_INFO_PKG.vhd
+src ../../autogen/CM_FW_INFO/CM_FW_INFO_map.vhd
+src ../../autogen/C2C_INTF/C2C_INTF_map.vhd
+src ../../autogen/C2C_INTF/C2C_INTF_PKG.vhd
+src ../../autogen/IO/IO_map.vhd
+src ../../autogen/IO/IO_PKG.vhd
+
+
+
+

configs/EMP_Cornell_rev2_p2_VU13p-1-SM_USP/settings.tcl

@@ -0,0 +1,19 @@
+
+#set the FPGA part number
+set FPGA_part xcvu13p-flga2577-1-e
+
+##for c2c
+set C2C F2_C2C
+set C2C_PHY ${C2C}_PHY
+set C2CB F2_C2CB
+set C2CB_PHY ${C2CB}_PHY
+
+#create remote device tree entries, set them to 64 bit
+global REMOTE_C2C_64
+set REMOTE_C2C_64 1
+
+
+set top top
+
+set outputDir ./
+