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[TIR] Add CUDA int4 tensor core intrinsics #14598

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merged 2 commits into from
Apr 12, 2023

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vinx13
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@vinx13 vinx13 commented Apr 11, 2023

This PR added int4 tensor intrinsic for CUDA tensor core.

cc @junrushao @tqchen @masahi

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LGTM. But I want to remind you that the int4 Tensor Core support is removed from the 4th Tensor Core (Rtx 40 serious and Hopper)

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yzh119 commented Apr 12, 2023

@Hzfengsy , int4 Tensor Cores is still supported in RTX 40 series, per Ada whitepaper.

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A slight issue, otherwise LGTM.

@@ -817,6 +916,12 @@ def wmma_sync_impl(a: T.handle, b: T.handle, c: T.handle) -> None:
*get_wmma_sync_intrin(16, 16, 16, "int8", "int32", True),
)

WMMA_SYNC_8x8x32_s4s4s32_TRANS_INTRIN = "wmma_sync_8x8x32_s4s4s32_trans"
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"wmma_sync_8x8x32_s4s4s32" is missing.

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sub-byte tensor core only allows A in row major and B in col major

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Oh that's interesting! Maybe we can leave a note somewhere.

@tqchen tqchen merged commit c1d1e9f into apache:main Apr 12, 2023
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5 participants