[TIR, CUDA] Add pass to replace global to shared memory copy with cp.async #11658
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Amazing work!! |
vinx13
approved these changes
Jun 9, 2022
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| Stmt VisitStmt_(const BufferStoreNode* store) { | ||
| if (in_async && (store->buffer.scope() == "shared" || store->buffer.scope() == "shared.dyn")) { | ||
| if (auto* load = store->value.as<BufferLoadNode>()) { |
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I'm wondering how we should handle the case that the value is not BufferLoad? For padding case maybe this can rely on the intrin provide predicated read, not sure about more complicated case. But this PR is good, no action needed for now
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Interesting. Indeed, currently it only supports the fixed pattern shared[...] = global[...]. But I think we can add more patterns as they come up, as long as we can extract the src pointer and the offset.
Kathryn-cat
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Jun 10, 2022
…async (apache#11658) * [TIR, CUDA] Add pass to replace global to shared memory copy with cp.async * add missing doc * black * missing src * clang format * clang format * check against nested async scope
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This pass looks for global to shared memory copy enclosed in the new
tir::attr::async_scopescope, and replace that with PTXcp.asyncintrinsics added in #11368.This pass is disabled by default, since
cp.asyncis only supported by NV gpus with sm >= 80. For now, the attrtir::attr::async_scopeand the proper synchronization need to be inserted manually in the input TIR. But I have a working branch https://github.com/apache/tvm/compare/main...masahi:inject-async-copy?expand=1 that automatically inserts such async regions and synchronizations as part of the software pipeline transform.@vinx13 @junrushao1994 @tqchen @csullivan