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fix(PeriphDrivers): Set default osr value #1164

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merged 1 commit into from
Sep 10, 2024
Merged

fix(PeriphDrivers): Set default osr value #1164

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5 changes: 5 additions & 0 deletions Libraries/PeriphDrivers/Source/UART/uart_ai87.c
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Original file line number Diff line number Diff line change
Expand Up @@ -141,6 +141,11 @@ int MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clo
return E_BAD_PARAM;
}

// Default OSR
// Setting LPUART Over-Sampling Rate in MXC_UART_RevB_SetFrequency function overwrites
// the sampling rate set below for the ERTCO.
uart->osr = 5;

unsigned int input_clock_freq = 0;
switch (clock) {
case MXC_UART_APB_CLK:
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3 changes: 3 additions & 0 deletions Libraries/PeriphDrivers/Source/UART/uart_me12.c
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Original file line number Diff line number Diff line change
Expand Up @@ -110,6 +110,9 @@ int MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clo
return E_BAD_PARAM;
}

// Default OSR
uart->osr = 5;

switch (clock) {
case MXC_UART_APB_CLK:
clock_freq = SystemCoreClock / 2;
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3 changes: 3 additions & 0 deletions Libraries/PeriphDrivers/Source/UART/uart_me30.c
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Original file line number Diff line number Diff line change
Expand Up @@ -113,6 +113,9 @@ int MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clo
return E_BAD_PARAM;
}

// Default OSR
uart->osr = 5;

switch (clock) {
case MXC_UART_APB_CLK:
clock_freq = PeripheralClock;
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3 changes: 3 additions & 0 deletions Libraries/PeriphDrivers/Source/UART/uart_me55.c
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Original file line number Diff line number Diff line change
Expand Up @@ -127,6 +127,9 @@ int MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clo
return E_BAD_PARAM;
}

// Default OSR
uart->osr = 5;

switch (clock) {
case MXC_UART_APB_CLK:
clock_freq = SystemCoreClock / 2;
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