std.Target: Pull toCoffMachine()/toElfMachine() up from Arch to Target.

This enables them to give more correct results. Contributes to ziglang#20771.
alexrp · Aug 10, 2024 · 4afef4d · 4afef4d
1 parent 3acf9c6
commit 4afef4d
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Showing 4 changed files with 98 additions and 98 deletions.
diff --git a/lib/compiler/aro/backend/Object/Elf.zig b/lib/compiler/aro/backend/Object/Elf.zig
@@ -199,7 +199,7 @@ pub fn finish(elf: *Elf, file: std.fs.File) !void {
     const elf_header = std.elf.Elf64_Ehdr{
         .e_ident = .{ 0x7F, 'E', 'L', 'F', 2, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
         .e_type = std.elf.ET.REL, // we only produce relocatables
-        .e_machine = elf.obj.target.cpu.arch.toElfMachine(),
+        .e_machine = elf.obj.target.toElfMachine(),
         .e_version = 1,
         .e_entry = 0, // linker will handle this
         .e_phoff = 0, // no program header

diff --git a/lib/std/Target.zig b/lib/std/Target.zig
@@ -829,6 +829,101 @@ pub const ObjectFormat = enum {
     }
 };
 
+pub fn toElfMachine(target: Target) std.elf.EM {
+    // TODO: Return IAMCU for elfiamcu OS.
+    return switch (target.cpu.arch) {
+        .amdgcn => .AMDGPU,
+        .arc => .ARC_COMPACT2,
+        .arm, .armeb, .thumb, .thumbeb => .ARM,
+        .aarch64, .aarch64_be => .AARCH64,
+        .avr => .AVR,
+        .bpfel, .bpfeb => .BPF,
+        .csky => .CSKY,
+        .hexagon => .HEXAGON,
+        .kalimba => .CSR_KALIMBA,
+        .lanai => .LANAI,
+        .loongarch32, .loongarch64 => .LOONGARCH,
+        .m68k => .@"68K",
+        .mips, .mips64, .mipsel, .mips64el => .MIPS,
+        .msp430 => .MSP430,
+        .powerpc, .powerpcle => .PPC,
+        .powerpc64, .powerpc64le => .PPC64,
+        .riscv32, .riscv64 => .RISCV,
+        .s390x => .S390,
+        .sparc => .SPARC, // TODO: Should be SPARC32PLUS when targeting 32-bit v9.
+        .sparc64 => .SPARCV9,
+        .spu_2 => .SPU_2,
+        .x86 => .@"386",
+        .x86_64 => .X86_64,
+        .xcore => .XCORE,
+        .xtensa => .XTENSA,
+
+        .dxil,
+        .nvptx,
+        .nvptx64,
+        .spirv,
+        .spirv32,
+        .spirv64,
+        .ve,
+        .wasm32,
+        .wasm64,
+        => .NONE,
+    };
+}
+
+pub fn toCoffMachine(target: Target) std.coff.MachineType {
+    return switch (target.cpu.arch) {
+        .arm => .ARM,
+        .thumb => .THUMB,
+        .aarch64 => .ARM64,
+        .loongarch32 => .LOONGARCH32,
+        .loongarch64 => .LOONGARCH64,
+        .riscv32 => .RISCV32,
+        .riscv64 => .RISCV64,
+        .x86 => .I386,
+        .x86_64 => .X64,
+
+        .amdgcn,
+        .arc,
+        .armeb,
+        .thumbeb,
+        .aarch64_be,
+        .avr,
+        .bpfel,
+        .bpfeb,
+        .csky,
+        .dxil,
+        .hexagon,
+        .kalimba,
+        .lanai,
+        .m68k,
+        .mips,
+        .mipsel,
+        .mips64,
+        .mips64el,
+        .msp430,
+        .nvptx,
+        .nvptx64,
+        .powerpc,
+        .powerpcle,
+        .powerpc64,
+        .powerpc64le,
+        .s390x,
+        .sparc,
+        .sparc64,
+        .spirv,
+        .spirv32,
+        .spirv64,
+        .spu_2,
+        .ve,
+        .wasm32,
+        .wasm64,
+        .xcore,
+        .xtensa,
+        => .UNKNOWN,
+    };
+}
+
 pub const SubSystem = enum {
     Console,
     Windows,
@@ -1202,101 +1297,6 @@ pub const Cpu = struct {
             return error.UnknownCpuModel;
         }
 
-        pub fn toElfMachine(arch: Arch) std.elf.EM {
-            // TODO: Return IAMCU for elfiamcu OS.
-            return switch (arch) {
-                .amdgcn => .AMDGPU,
-                .arc => .ARC_COMPACT2,
-                .arm, .armeb, .thumb, .thumbeb => .ARM,
-                .aarch64, .aarch64_be => .AARCH64,
-                .avr => .AVR,
-                .bpfel, .bpfeb => .BPF,
-                .csky => .CSKY,
-                .hexagon => .HEXAGON,
-                .kalimba => .CSR_KALIMBA,
-                .lanai => .LANAI,
-                .loongarch32, .loongarch64 => .LOONGARCH,
-                .m68k => .@"68K",
-                .mips, .mips64, .mipsel, .mips64el => .MIPS,
-                .msp430 => .MSP430,
-                .powerpc, .powerpcle => .PPC,
-                .powerpc64, .powerpc64le => .PPC64,
-                .riscv32, .riscv64 => .RISCV,
-                .s390x => .S390,
-                .sparc => .SPARC, // TODO: Should be SPARC32PLUS when targeting 32-bit v9.
-                .sparc64 => .SPARCV9,
-                .spu_2 => .SPU_2,
-                .x86 => .@"386",
-                .x86_64 => .X86_64,
-                .xcore => .XCORE,
-                .xtensa => .XTENSA,
-
-                .dxil,
-                .nvptx,
-                .nvptx64,
-                .spirv,
-                .spirv32,
-                .spirv64,
-                .ve,
-                .wasm32,
-                .wasm64,
-                => .NONE,
-            };
-        }
-
-        pub fn toCoffMachine(arch: Arch) std.coff.MachineType {
-            return switch (arch) {
-                .arm => .ARM,
-                .thumb => .THUMB,
-                .aarch64 => .ARM64,
-                .loongarch32 => .LOONGARCH32,
-                .loongarch64 => .LOONGARCH64,
-                .riscv32 => .RISCV32,
-                .riscv64 => .RISCV64,
-                .x86 => .I386,
-                .x86_64 => .X64,
-
-                .amdgcn,
-                .arc,
-                .armeb,
-                .thumbeb,
-                .aarch64_be,
-                .avr,
-                .bpfel,
-                .bpfeb,
-                .csky,
-                .dxil,
-                .hexagon,
-                .kalimba,
-                .lanai,
-                .m68k,
-                .mips,
-                .mipsel,
-                .mips64,
-                .mips64el,
-                .msp430,
-                .nvptx,
-                .nvptx64,
-                .powerpc,
-                .powerpcle,
-                .powerpc64,
-                .powerpc64le,
-                .s390x,
-                .sparc,
-                .sparc64,
-                .spirv,
-                .spirv32,
-                .spirv64,
-                .spu_2,
-                .ve,
-                .wasm32,
-                .wasm64,
-                .xcore,
-                .xtensa,
-                => .UNKNOWN,
-            };
-        }
-
         pub fn endian(arch: Arch) std.builtin.Endian {
             return switch (arch) {
                 .avr,

diff --git a/src/link/Coff.zig b/src/link/Coff.zig
@@ -2292,7 +2292,7 @@ fn writeHeader(self: *Coff) !void {
     const timestamp = if (self.repro) 0 else std.time.timestamp();
     const size_of_optional_header = @as(u16, @intCast(self.getOptionalHeaderSize() + self.getDataDirectoryHeadersSize()));
     var coff_header = coff.CoffHeader{
-        .machine = target.cpu.arch.toCoffMachine(),
+        .machine = target.toCoffMachine(),
         .number_of_sections = @as(u16, @intCast(self.sections.slice().len)), // TODO what if we prune a section
         .time_date_stamp = @as(u32, @truncate(@as(u64, @bitCast(timestamp)))),
         .pointer_to_symbol_table = self.strtab_offset orelse 0,

diff --git a/src/link/Elf.zig b/src/link/Elf.zig
@@ -2831,7 +2831,7 @@ pub fn writeElfHeader(self: *Elf) !void {
     mem.writeInt(u16, hdr_buf[index..][0..2], @intFromEnum(elf_type), endian);
     index += 2;
 
-    const machine = target.cpu.arch.toElfMachine();
+    const machine = target.toElfMachine();
     mem.writeInt(u16, hdr_buf[index..][0..2], @intFromEnum(machine), endian);
     index += 2;