Fix for long length SPI writes on ATMEL #7673
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jepler
approved these changes
Mar 4, 2023
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Looks pretty safe, though I notice that for (say) a transfer of 65536+16 bytes it will do a DMA transfer of the final 16 bytes. This is probably just fine, I think avoiding DMA for small transfers is just for efficiency, not correctness. Didn't test, would love to hear from @gamblor21 before merging if this fixes the original problem
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oh wait, you filed the PR. I'm apparently not far enough into this mug of coffee yet :) |
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Fixes #7670
Writes over 64Kb were failing as that is the maximum a DMA write can handle.
Possible other fix would involve chaining DMA transaction buffers but the break between buffers was about 3 microseconds so probably not an issue.
This could be moved into
dma.cbut then would have to be careful about QSPI (which has this problem but at 4x the size). This was the easier place to put it in, but open if we want to modify it too. It seems only SPI/QSPI uses the routine in question.