Skip to content

Commit

Permalink
fix: Increases drive strength of 32kHz external crystal, in line with…
Browse files Browse the repository at this point in the history
… calculations specified in ST AN2867 sections 3.3, 3.4, and STM32L4 datasheet DS12023 Table 58. LSE oscillator characteristics.

The drive strength RCC_LSEDRIVE_LOW is marginal for the 32kHz crystal oscillator stability, and RCC_LSEDRIVE_MEDIUMLOW meets the calculated drive strength with a small margin for parasitic capacitance.
  • Loading branch information
m-mcgowan committed Feb 28, 2023
1 parent cb6201d commit e2c6cf5
Show file tree
Hide file tree
Showing 2 changed files with 6 additions and 1 deletion.
3 changes: 3 additions & 0 deletions ports/stm/boards/swan_r5/mpconfigboard.h
Original file line number Diff line number Diff line change
Expand Up @@ -45,6 +45,9 @@
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
#define BOARD_HAS_HIGH_SPEED_CRYSTAL (0)

// Increase drive strength of 32kHz external crystal, in line with calculations specified in ST AN2867 sections 3.3, 3.4, and STM32L4 datasheet DS12023 Table 58. LSE oscillator characteristics.
// The drive strength RCC_LSEDRIVE_LOW is marginal for the 32kHz crystal oscillator stability, and RCC_LSEDRIVE_MEDIUMLOW meets the calculated drive strength with a small margin for parasitic capacitance.
#define BOARD_LSE_DRIVE_LEVEL RCC_LSEDRIVE_MEDIUMLOW

// Bootloader only
#ifdef UF2_BOOTLOADER_ENABLED
Expand Down
4 changes: 3 additions & 1 deletion ports/stm/peripherals/stm32l4/clocks.c
Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,8 @@
#error HSE support needs to be added for the L4 family.
#elif !BOARD_HAS_LOW_SPEED_CRYSTAL
#error LSE clock source required
#elif !defined(BOARD_LSE_DRIVE_LEVEL)
#error BOARD_LSE_DRIVE_LEVEL is not defined for this board. The board should define the drive strength of 32kHz external crystal in line with calculations specified in ST AN2867 sections 3.3, 3.4, and STM32L4 datasheet DS12023 Table 58, LSE oscillator characteristics.
#endif

void Error_Handler(void) {
Expand All @@ -57,7 +59,7 @@ void stm32_peripherals_clocks_init(void) {

// Configure LSE Drive
HAL_PWR_EnableBkUpAccess();
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
__HAL_RCC_LSEDRIVE_CONFIG(BOARD_LSE_DRIVE_LEVEL);
__HAL_RCC_PWR_CLK_ENABLE();

/** Configure the main internal regulator output voltage
Expand Down

0 comments on commit e2c6cf5

Please sign in to comment.