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Winch: Add replace_lane instructions for x64 with AVX (bytecodeallian…
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…ce#10082)

* Winch: Add replace_lane instructions for x64 with AVX

* Add check for AVX

* Make operand size conversion a helper function
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@jeffcharles
jeffcharles authored Jan 24, 2025
1 parent b131a1a commit 1ad7a4f
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Showing 23 changed files with 1,253 additions and 230 deletions.
2 changes: 1 addition & 1 deletion crates/wast-util/src/lib.rs
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Expand Up @@ -430,7 +430,6 @@ impl WastTest {
"misc_testsuite/simd/issue6725-no-egraph-panic.wast",
"misc_testsuite/simd/issue_3327_bnot_lowering.wast",
"misc_testsuite/simd/load_splat_out_of_bounds.wast",
"misc_testsuite/simd/replace-lane-preserve.wast",
"misc_testsuite/simd/unaligned-load.wast",
"multi-memory/simd_memory-multi.wast",
"spec_testsuite/simd_bit_shift.wast",
Expand Down Expand Up @@ -499,6 +498,7 @@ impl WastTest {
#[cfg(target_arch = "x86_64")]
if !(std::is_x86_feature_detected!("avx") && std::is_x86_feature_detected!("avx2")) {
let unsupported = [
"misc_testsuite/simd/replace-lane-preserve.wast",
"misc_testsuite/simd/spillslot-size-fuzzbug.wast",
"misc_testsuite/winch/_simd_lane.wast",
"misc_testsuite/winch/_simd_splat.wast",
Expand Down
42 changes: 42 additions & 0 deletions tests/disas/winch/x64/f32x4_replace_lane/const_avx.wat
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@@ -0,0 +1,42 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result v128)
(f32x4.replace_lane 1 (v128.const i64x2 1 2) (f32.const 0))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x44
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0x1c(%rip), %xmm0
;; vinsertps $0x10, 0x22(%rip), %xmm0, %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 44: ud2
;; 46: addb %al, (%rax)
;; 48: addb %al, (%rax)
;; 4a: addb %al, (%rax)
;; 4c: addb %al, (%rax)
;; 4e: addb %al, (%rax)
;; 50: addl %eax, (%rax)
;; 52: addb %al, (%rax)
;; 54: addb %al, (%rax)
;; 56: addb %al, (%rax)
;; 58: addb (%rax), %al
;; 5a: addb %al, (%rax)
;; 5c: addb %al, (%rax)
;; 5e: addb %al, (%rax)
;; 60: addb %al, (%rax)
;; 62: addb %al, (%rax)
44 changes: 44 additions & 0 deletions tests/disas/winch/x64/f32x4_replace_lane/param_avx.wat
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@@ -0,0 +1,44 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (param f32) (result v128)
(f32x4.replace_lane 1 (v128.const i64x2 1 2) (local.get 0))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x20, %r11
;; cmpq %rsp, %r11
;; ja 0x51
;; 1c: movq %rdi, %r14
;; subq $0x20, %rsp
;; movq %rdi, 0x18(%rsp)
;; movq %rsi, 0x10(%rsp)
;; movss %xmm0, 0xc(%rsp)
;; movss 0xc(%rsp), %xmm0
;; movdqu 0x1f(%rip), %xmm1
;; vinsertps $0x10, %xmm0, %xmm1, %xmm1
;; movdqa %xmm1, %xmm0
;; addq $0x20, %rsp
;; popq %rbp
;; retq
;; 51: ud2
;; 53: addb %al, (%rax)
;; 55: addb %al, (%rax)
;; 57: addb %al, (%rax)
;; 59: addb %al, (%rax)
;; 5b: addb %al, (%rax)
;; 5d: addb %al, (%rax)
;; 5f: addb %al, (%rcx)
;; 61: addb %al, (%rax)
;; 63: addb %al, (%rax)
;; 65: addb %al, (%rax)
;; 67: addb %al, (%rdx)
;; 69: addb %al, (%rax)
;; 6b: addb %al, (%rax)
;; 6d: addb %al, (%rax)
45 changes: 45 additions & 0 deletions tests/disas/winch/x64/f64x2_replace_lane/const_lane0_avx.wat
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@@ -0,0 +1,45 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result v128)
(f64x2.replace_lane 0 (v128.const i64x2 1 2) (f64.const 0))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x42
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0x1c(%rip), %xmm0
;; vmovsd 0x24(%rip), %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 42: ud2
;; 44: addb %al, (%rax)
;; 46: addb %al, (%rax)
;; 48: addb %al, (%rax)
;; 4a: addb %al, (%rax)
;; 4c: addb %al, (%rax)
;; 4e: addb %al, (%rax)
;; 50: addl %eax, (%rax)
;; 52: addb %al, (%rax)
;; 54: addb %al, (%rax)
;; 56: addb %al, (%rax)
;; 58: addb (%rax), %al
;; 5a: addb %al, (%rax)
;; 5c: addb %al, (%rax)
;; 5e: addb %al, (%rax)
;; 60: addb %al, (%rax)
;; 62: addb %al, (%rax)
;; 64: addb %al, (%rax)
;; 66: addb %al, (%rax)
45 changes: 45 additions & 0 deletions tests/disas/winch/x64/f64x2_replace_lane/const_lane1_avx.wat
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@@ -0,0 +1,45 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result v128)
(f64x2.replace_lane 1 (v128.const i64x2 1 2) (f64.const 0))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x42
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0x1c(%rip), %xmm0
;; vmovhps 0x24(%rip), %xmm0, %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 42: ud2
;; 44: addb %al, (%rax)
;; 46: addb %al, (%rax)
;; 48: addb %al, (%rax)
;; 4a: addb %al, (%rax)
;; 4c: addb %al, (%rax)
;; 4e: addb %al, (%rax)
;; 50: addl %eax, (%rax)
;; 52: addb %al, (%rax)
;; 54: addb %al, (%rax)
;; 56: addb %al, (%rax)
;; 58: addb (%rax), %al
;; 5a: addb %al, (%rax)
;; 5c: addb %al, (%rax)
;; 5e: addb %al, (%rax)
;; 60: addb %al, (%rax)
;; 62: addb %al, (%rax)
;; 64: addb %al, (%rax)
;; 66: addb %al, (%rax)
45 changes: 45 additions & 0 deletions tests/disas/winch/x64/f64x2_replace_lane/param_lane0_avx.wat
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@@ -0,0 +1,45 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (param f64) (result v128)
(f64x2.replace_lane 0 (v128.const i64x2 1 2) (local.get 0))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x20, %r11
;; cmpq %rsp, %r11
;; ja 0x4f
;; 1c: movq %rdi, %r14
;; subq $0x20, %rsp
;; movq %rdi, 0x18(%rsp)
;; movq %rsi, 0x10(%rsp)
;; movsd %xmm0, 8(%rsp)
;; movsd 8(%rsp), %xmm0
;; movdqu 0x1f(%rip), %xmm1
;; vmovsd %xmm0, %xmm1, %xmm1
;; movdqa %xmm1, %xmm0
;; addq $0x20, %rsp
;; popq %rbp
;; retq
;; 4f: ud2
;; 51: addb %al, (%rax)
;; 53: addb %al, (%rax)
;; 55: addb %al, (%rax)
;; 57: addb %al, (%rax)
;; 59: addb %al, (%rax)
;; 5b: addb %al, (%rax)
;; 5d: addb %al, (%rax)
;; 5f: addb %al, (%rcx)
;; 61: addb %al, (%rax)
;; 63: addb %al, (%rax)
;; 65: addb %al, (%rax)
;; 67: addb %al, (%rdx)
;; 69: addb %al, (%rax)
;; 6b: addb %al, (%rax)
;; 6d: addb %al, (%rax)
45 changes: 45 additions & 0 deletions tests/disas/winch/x64/f64x2_replace_lane/param_lane1_avx.wat
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@@ -0,0 +1,45 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (param f64) (result v128)
(f64x2.replace_lane 1 (v128.const i64x2 1 2) (local.get 0))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x20, %r11
;; cmpq %rsp, %r11
;; ja 0x4f
;; 1c: movq %rdi, %r14
;; subq $0x20, %rsp
;; movq %rdi, 0x18(%rsp)
;; movq %rsi, 0x10(%rsp)
;; movsd %xmm0, 8(%rsp)
;; movsd 8(%rsp), %xmm0
;; movdqu 0x1f(%rip), %xmm1
;; vmovlhps %xmm0, %xmm1, %xmm1
;; movdqa %xmm1, %xmm0
;; addq $0x20, %rsp
;; popq %rbp
;; retq
;; 4f: ud2
;; 51: addb %al, (%rax)
;; 53: addb %al, (%rax)
;; 55: addb %al, (%rax)
;; 57: addb %al, (%rax)
;; 59: addb %al, (%rax)
;; 5b: addb %al, (%rax)
;; 5d: addb %al, (%rax)
;; 5f: addb %al, (%rcx)
;; 61: addb %al, (%rax)
;; 63: addb %al, (%rax)
;; 65: addb %al, (%rax)
;; 67: addb %al, (%rdx)
;; 69: addb %al, (%rax)
;; 6b: addb %al, (%rax)
;; 6d: addb %al, (%rax)
42 changes: 42 additions & 0 deletions tests/disas/winch/x64/i16x8_replace_lane/const_avx.wat
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@@ -0,0 +1,42 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result v128)
(i16x8.replace_lane 1 (v128.const i64x2 1 2) (i32.const 0))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x43
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0x1c(%rip), %xmm0
;; vpinsrw $1, 0x23(%rip), %xmm0, %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 43: ud2
;; 45: addb %al, (%rax)
;; 47: addb %al, (%rax)
;; 49: addb %al, (%rax)
;; 4b: addb %al, (%rax)
;; 4d: addb %al, (%rax)
;; 4f: addb %al, (%rcx)
;; 51: addb %al, (%rax)
;; 53: addb %al, (%rax)
;; 55: addb %al, (%rax)
;; 57: addb %al, (%rdx)
;; 59: addb %al, (%rax)
;; 5b: addb %al, (%rax)
;; 5d: addb %al, (%rax)
;; 5f: addb %al, (%rax)
;; 61: addb %al, (%rax)
40 changes: 40 additions & 0 deletions tests/disas/winch/x64/i16x8_replace_lane/param_avx.wat
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@@ -0,0 +1,40 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (param i32) (result v128)
(i16x8.replace_lane 1 (v128.const i64x2 1 2) (local.get 0))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x20, %r11
;; cmpq %rsp, %r11
;; ja 0x48
;; 1c: movq %rdi, %r14
;; subq $0x20, %rsp
;; movq %rdi, 0x18(%rsp)
;; movq %rsi, 0x10(%rsp)
;; movl %edx, 0xc(%rsp)
;; movl 0xc(%rsp), %eax
;; movdqu 0x13(%rip), %xmm0
;; vpinsrw $1, %eax, %xmm0, %xmm0
;; addq $0x20, %rsp
;; popq %rbp
;; retq
;; 48: ud2
;; 4a: addb %al, (%rax)
;; 4c: addb %al, (%rax)
;; 4e: addb %al, (%rax)
;; 50: addl %eax, (%rax)
;; 52: addb %al, (%rax)
;; 54: addb %al, (%rax)
;; 56: addb %al, (%rax)
;; 58: addb (%rax), %al
;; 5a: addb %al, (%rax)
;; 5c: addb %al, (%rax)
;; 5e: addb %al, (%rax)
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