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This is a riscv 5-stage pipeline CPU simulator. Support cache, virtual addressing, different branch prediction strategies.

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YipZLF/RISCV-simulator

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A 5-stage pipeline simulator of RISC-V cpu.

Usage

  1. make sure you have cmake (version>=3.14)
  2. run the following command to build.
mkdir build
cd build
cmake .. & make

or

bash ./build.sh

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This is a riscv 5-stage pipeline CPU simulator. Support cache, virtual addressing, different branch prediction strategies.

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