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replace aiertx with aiert (drop the x)
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@fifield
fifield committed Sep 10, 2024
1 parent ca65f4b commit 3135638
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Showing 10 changed files with 100 additions and 101 deletions.
19 changes: 9 additions & 10 deletions include/aie-c/Translation.h
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Original file line number Diff line number Diff line change
Expand Up @@ -44,18 +44,17 @@ MLIR_CAPI_EXPORTED MlirLogicalResult aieTranslateToCtrlpkt(
MLIR_CAPI_EXPORTED MlirOperation aieTranslateBinaryToTxn(MlirContext ctx,
MlirStringRef binary);

struct AieRtxControl {
struct AieRtControl {
void *ptr;
};
using AieRtxControl = struct AieRtxControl;

MLIR_CAPI_EXPORTED AieRtxControl getAieRtxControl(AieTargetModel tm);
MLIR_CAPI_EXPORTED void freeAieRtxControl(AieRtxControl aieCtl);
MLIR_CAPI_EXPORTED void aieRtxStartTransaction(AieRtxControl aieCtl);
MLIR_CAPI_EXPORTED void aieRtxDmaUpdateBdAddr(AieRtxControl aieCtl, int col,
int row, size_t addr,
size_t bdId);
MLIR_CAPI_EXPORTED void aieRtxExportSerializedTransaction(AieRtxControl aieCtl);
using AieRtControl = struct AieRtControl;

MLIR_CAPI_EXPORTED AieRtControl getAieRtControl(AieTargetModel tm);
MLIR_CAPI_EXPORTED void freeAieRtControl(AieRtControl aieCtl);
MLIR_CAPI_EXPORTED void aieRtStartTransaction(AieRtControl aieCtl);
MLIR_CAPI_EXPORTED void aieRtDmaUpdateBdAddr(AieRtControl aieCtl, int col,
int row, size_t addr, size_t bdId);
MLIR_CAPI_EXPORTED void aieRtExportSerializedTransaction(AieRtControl aieCtl);

#ifdef __cplusplus
}
Expand Down
20 changes: 10 additions & 10 deletions include/aie/Targets/AIERTX.h → include/aie/Targets/AIERT.h
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
//===- AIERTX.h -------------------------------------------------*- C++ -*-===//
//===- AIERT.h --------------------------------------------------*- C++ -*-===//
//
// This file is licensed under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
Expand All @@ -8,8 +8,8 @@
//
//===----------------------------------------------------------------------===//

#ifndef AIE_AIERTX_H
#define AIE_AIERTX_H
#ifndef AIE_AIERT_H
#define AIE_AIERT_H

#include "aie/Dialect/AIE/IR/AIEDialect.h"
#include "aie/Dialect/AIE/IR/AIEEnums.h"
Expand Down Expand Up @@ -112,7 +112,7 @@ llvm::raw_ostream &operator<<(llvm::raw_ostream &os, const XAie_Lock &lock);

llvm::raw_ostream &operator<<(llvm::raw_ostream &os, const XAie_Packet &packet);

#define SHOW_AIERTX_ARGS(os, ...) showAIEXRTArgs(os, #__VA_ARGS__, __VA_ARGS__)
#define SHOW_AIERT_ARGS(os, ...) showAIEXRTArgs(os, #__VA_ARGS__, __VA_ARGS__)

// So that we can use the pattern if(auto r = TRY_XAIE_API...) { // r is nonzero
// }
Expand All @@ -121,7 +121,7 @@ static_assert(XAIE_OK == 0);
#define TRY_XAIE_API_FATAL_ERROR(API, ...) \
do { \
LLVM_DEBUG(llvm::dbgs() << "trying XAIE API: " << #API << " with args: "); \
LLVM_DEBUG(SHOW_AIERTX_ARGS(llvm::dbgs(), __VA_ARGS__)); \
LLVM_DEBUG(SHOW_AIERT_ARGS(llvm::dbgs(), __VA_ARGS__)); \
LLVM_DEBUG(llvm::dbgs() << "\n"); \
if (auto r = API(__VA_ARGS__)) \
llvm::report_fatal_error(llvm::Twine(#API " failed with ") + \
Expand All @@ -131,7 +131,7 @@ static_assert(XAIE_OK == 0);
#define TRY_XAIE_API_EMIT_ERROR(OP, API, ...) \
do { \
LLVM_DEBUG(llvm::dbgs() << "trying XAIE API: " << #API << " with args: "); \
LLVM_DEBUG(SHOW_AIERTX_ARGS(llvm::dbgs(), __VA_ARGS__)); \
LLVM_DEBUG(SHOW_AIERT_ARGS(llvm::dbgs(), __VA_ARGS__)); \
LLVM_DEBUG(llvm::dbgs() << "\n"); \
if (auto r = API(__VA_ARGS__)) \
return OP.emitOpError() << #API " failed with " << AIERCTOSTR.at(r); \
Expand All @@ -140,7 +140,7 @@ static_assert(XAIE_OK == 0);
#define TRY_XAIE_API_LOGICAL_RESULT(API, ...) \
do { \
LLVM_DEBUG(llvm::dbgs() << "trying XAIE API: " << #API << " with args: "); \
LLVM_DEBUG(SHOW_AIERTX_ARGS(llvm::dbgs(), __VA_ARGS__)); \
LLVM_DEBUG(SHOW_AIERT_ARGS(llvm::dbgs(), __VA_ARGS__)); \
LLVM_DEBUG(llvm::dbgs() << "\n"); \
if (auto r = API(__VA_ARGS__)) { \
llvm::errs() << #API " failed with " << AIERCTOSTR.at(r); \
Expand Down Expand Up @@ -186,12 +186,12 @@ static_assert(XAIE_OK == 0);
#define BASE_ADDR_A_INCR 0x80000

namespace xilinx::AIE {
struct AIERTXControl {
struct AIERTControl {
XAie_Config configPtr;
XAie_DevInst devInst;
const BaseNPUTargetModel &targetModel;

AIERTXControl(const xilinx::AIE::BaseNPUTargetModel &tm);
AIERTControl(const xilinx::AIE::BaseNPUTargetModel &tm);

mlir::LogicalResult setIOBackend(bool aieSim, bool xaieDebug);
mlir::LogicalResult configureBdInBlock(XAie_DmaDesc &dmaTileBd,
Expand Down Expand Up @@ -223,4 +223,4 @@ struct AIERTXControl {

} // namespace xilinx::AIE

#endif // AIE_AIERTX_H
#endif // AIE_AIERT_H
26 changes: 13 additions & 13 deletions lib/CAPI/Translation.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,7 @@
#include "aie-c/Translation.h"

#include "aie/Dialect/AIE/IR/AIETargetModel.h"
#include "aie/Targets/AIERTX.h"
#include "aie/Targets/AIERT.h"
#include "aie/Targets/AIETargets.h"

#include "mlir-c/IR.h"
Expand Down Expand Up @@ -226,33 +226,33 @@ MlirStringRef aieLLVMLink(MlirStringRef *modules, int nModules) {
return mlirStringRefCreate(cStr, ll.size());
}

DEFINE_C_API_PTR_METHODS(AieRtxControl, xilinx::AIE::AIERTXControl)
DEFINE_C_API_PTR_METHODS(AieRtControl, xilinx::AIE::AIERTControl)

AieRtxControl getAieRtxControl(AieTargetModel tm) {
AieRtControl getAieRtControl(AieTargetModel tm) {
// unwrap the target model
const BaseNPUTargetModel &targetModel =
*reinterpret_cast<const BaseNPUTargetModel *>(tm.d);
AIERTXControl *ctl = new AIERTXControl(targetModel);
AIERTControl *ctl = new AIERTControl(targetModel);
return wrap(ctl);
}

void freeAieRtxControl(AieRtxControl aieCtl) {
AIERTXControl *ctl = unwrap(aieCtl);
void freeAieRtControl(AieRtControl aieCtl) {
AIERTControl *ctl = unwrap(aieCtl);
delete ctl;
}

void aieRtxDmaUpdateBdAddr(AieRtxControl aieCtl, int col, int row, size_t addr,
size_t bdId) {
AIERTXControl *ctl = unwrap(aieCtl);
void aieRtDmaUpdateBdAddr(AieRtControl aieCtl, int col, int row, size_t addr,
size_t bdId) {
AIERTControl *ctl = unwrap(aieCtl);
ctl->dmaUpdateBdAddr(col, row, addr, bdId);
}

void aieRtxStartTransaction(AieRtxControl aieCtl) {
AIERTXControl *ctl = unwrap(aieCtl);
void aieRtStartTransaction(AieRtControl aieCtl) {
AIERTControl *ctl = unwrap(aieCtl);
ctl->startTransaction();
}

void aieRtxExportSerializedTransaction(AieRtxControl aieCtl) {
AIERTXControl *ctl = unwrap(aieCtl);
void aieRtExportSerializedTransaction(AieRtControl aieCtl) {
AIERTControl *ctl = unwrap(aieCtl);
ctl->exportSerializedTransaction();
}
60 changes: 30 additions & 30 deletions lib/Targets/AIERTX.cpp → lib/Targets/AIERT.cpp
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
//===- AIERTX.cpp -----------------------------------------------*- C++ -*-===//
//===- AIERT.cpp ------------------------------------------------*- C++ -*-===//
//
// This file is licensed under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
Expand All @@ -8,7 +8,7 @@
//
//===----------------------------------------------------------------------===//

#include "aie/Targets/AIERTX.h"
#include "aie/Targets/AIERT.h"

#include "mlir/Support/LogicalResult.h"

Expand All @@ -29,7 +29,7 @@ extern "C" {

using namespace mlir;

#define DEBUG_TYPE "aie-aiertx"
#define DEBUG_TYPE "aie-aiert"

llvm::raw_ostream &operator<<(llvm::raw_ostream &os, const XAie_LocType &loc) {
os << "XAie_LocType(col: " << std::to_string(loc.Col)
Expand All @@ -52,7 +52,7 @@ llvm::raw_ostream &operator<<(llvm::raw_ostream &os,

namespace xilinx::AIE {

AIERTXControl::AIERTXControl(const AIE::BaseNPUTargetModel &tm)
AIERTControl::AIERTControl(const AIE::BaseNPUTargetModel &tm)
: targetModel(tm) {
// The first column in the NPU lacks a shim tile. AIE-RT exposes some of
// the internals about how this is modeled in a somewhat awkward way.
Expand Down Expand Up @@ -98,7 +98,7 @@ AIERTXControl::AIERTXControl(const AIE::BaseNPUTargetModel &tm)
TRY_XAIE_API_FATAL_ERROR(XAie_UpdateNpiAddr, &devInst, NPI_ADDR);
}

LogicalResult AIERTXControl::setIOBackend(bool aieSim, bool xaieDebug) {
LogicalResult AIERTControl::setIOBackend(bool aieSim, bool xaieDebug) {
// Quoting: The instance of a device must be always declared using this
// macro. In the future, the same macro will be expanded to
// allocate more memory from the user application for resource
Expand All @@ -113,9 +113,9 @@ LogicalResult AIERTXControl::setIOBackend(bool aieSim, bool xaieDebug) {
return success();
}

LogicalResult AIERTXControl::configureLocksInBdBlock(XAie_DmaDesc &dmaTileBd,
Block &block,
XAie_LocType &tileLoc) {
LogicalResult AIERTControl::configureLocksInBdBlock(XAie_DmaDesc &dmaTileBd,
Block &block,
XAie_LocType &tileLoc) {
LLVM_DEBUG(llvm::dbgs() << "\nstart configuring bds\n");
std::optional<int> acqValue, relValue, acqLockId, relLockId;
bool acqEn = false;
Expand Down Expand Up @@ -163,10 +163,10 @@ LogicalResult AIERTXControl::configureLocksInBdBlock(XAie_DmaDesc &dmaTileBd,
return success();
}

LogicalResult AIERTXControl::configureBdInBlock(XAie_DmaDesc &dmaTileBd,
Block &block,
XAie_LocType &tileLoc, int bdId,
std::optional<int> nextBdId) {
LogicalResult AIERTControl::configureBdInBlock(XAie_DmaDesc &dmaTileBd,
Block &block,
XAie_LocType &tileLoc, int bdId,
std::optional<int> nextBdId) {
std::optional<int> packetType;
std::optional<int> packetID;

Expand Down Expand Up @@ -309,9 +309,10 @@ LogicalResult AIERTXControl::configureBdInBlock(XAie_DmaDesc &dmaTileBd,
return success();
};

LogicalResult AIERTXControl::pushToBdQueueAndEnable(
Operation &op, XAie_LocType &tileLoc, int chNum,
const DMAChannelDir &channelDir, int bdId, int repeatCount) {
LogicalResult
AIERTControl::pushToBdQueueAndEnable(Operation &op, XAie_LocType &tileLoc,
int chNum, const DMAChannelDir &channelDir,
int bdId, int repeatCount) {
XAie_DmaDirection direction =
channelDir == DMAChannelDir::S2MM ? DMA_S2MM : DMA_MM2S;
auto enTokenIssue = tileLoc.Row == 0 && direction == DMA_S2MM;
Expand All @@ -325,8 +326,8 @@ LogicalResult AIERTXControl::pushToBdQueueAndEnable(
return success();
};

LogicalResult AIERTXControl::configureLocksAndBd(Block &block,
XAie_LocType tileLoc) {
LogicalResult AIERTControl::configureLocksAndBd(Block &block,
XAie_LocType tileLoc) {
DMABDOp bd = *block.getOps<DMABDOp>().begin();
assert(bd.getBdId().has_value() &&
"DMABDOp must have assigned bd_id; did you forget to run "
Expand All @@ -343,7 +344,7 @@ LogicalResult AIERTXControl::configureLocksAndBd(Block &block,
return success();
}

LogicalResult AIERTXControl::initLocks(DeviceOp &targetOp) {
LogicalResult AIERTControl::initLocks(DeviceOp &targetOp) {
for (auto tileOp : targetOp.getOps<TileOp>()) {
auto tileLoc = XAie_TileLoc(tileOp.colIndex(), tileOp.rowIndex());
if (!tileOp.isShimTile() && tileOp.getCoreOp()) {
Expand Down Expand Up @@ -372,7 +373,7 @@ LogicalResult AIERTXControl::initLocks(DeviceOp &targetOp) {
return success();
}

LogicalResult AIERTXControl::configureSwitches(DeviceOp &targetOp) {
LogicalResult AIERTControl::configureSwitches(DeviceOp &targetOp) {

// StreamSwitch (switchbox) configuration
for (auto switchboxOp : targetOp.getOps<SwitchboxOp>()) {
Expand Down Expand Up @@ -496,7 +497,7 @@ LogicalResult AIERTXControl::configureSwitches(DeviceOp &targetOp) {
return success();
}

LogicalResult AIERTXControl::addInitConfig(DeviceOp &targetOp) {
LogicalResult AIERTControl::addInitConfig(DeviceOp &targetOp) {

if (failed(initLocks(targetOp))) {
return failure();
Expand Down Expand Up @@ -560,7 +561,7 @@ LogicalResult AIERTXControl::addInitConfig(DeviceOp &targetOp) {
return success();
}

LogicalResult AIERTXControl::addCoreEnable(DeviceOp &targetOp) {
LogicalResult AIERTControl::addCoreEnable(DeviceOp &targetOp) {
// Start execution of all the cores.
for (auto tileOp : targetOp.getOps<TileOp>()) {
auto tileLoc = XAie_TileLoc(tileOp.colIndex(), tileOp.rowIndex());
Expand All @@ -570,8 +571,8 @@ LogicalResult AIERTXControl::addCoreEnable(DeviceOp &targetOp) {
return success();
}

LogicalResult AIERTXControl::addAieElf(uint8_t col, uint8_t row,
const StringRef elfPath, bool aieSim) {
LogicalResult AIERTControl::addAieElf(uint8_t col, uint8_t row,
const StringRef elfPath, bool aieSim) {
TRY_XAIE_API_LOGICAL_RESULT(XAie_CoreDisable, &devInst,
XAie_TileLoc(col, row));
TRY_XAIE_API_LOGICAL_RESULT(XAie_DmaChannelResetAll, &devInst,
Expand All @@ -590,9 +591,9 @@ LogicalResult AIERTXControl::addAieElf(uint8_t col, uint8_t row,
return success();
}

LogicalResult AIERTXControl::addAieElfs(DeviceOp &targetOp,
const StringRef workDirPath,
bool aieSim) {
LogicalResult AIERTControl::addAieElfs(DeviceOp &targetOp,
const StringRef workDirPath,
bool aieSim) {
for (auto tileOp : targetOp.getOps<TileOp>())
if (tileOp.isShimNOCorPLTile()) {
// Resets no needed with V2 kernel driver
Expand All @@ -619,18 +620,17 @@ LogicalResult AIERTXControl::addAieElfs(DeviceOp &targetOp,
return success();
}

void AIERTXControl::dmaUpdateBdAddr(int col, int row, size_t addr,
size_t bdId) {
void AIERTControl::dmaUpdateBdAddr(int col, int row, size_t addr, size_t bdId) {
auto tileLoc = XAie_TileLoc(col, row);
TRY_XAIE_API_FATAL_ERROR(XAie_DmaUpdateBdAddr, &devInst, tileLoc, addr, bdId);
}

void AIERTXControl::startTransaction() {
void AIERTControl::startTransaction() {
TRY_XAIE_API_FATAL_ERROR(XAie_StartTransaction, &devInst,
XAIE_TRANSACTION_DISABLE_AUTO_FLUSH);
}

void AIERTXControl::exportSerializedTransaction() {
void AIERTControl::exportSerializedTransaction() {
XAie_TxnInst *txnInst = XAie_ExportTransactionInstance(&devInst);
std::ios_base::fmtflags f(std::cout.flags());
for (size_t i = 0; i < txnInst->NumCmds; ++i) {
Expand Down
17 changes: 9 additions & 8 deletions lib/Targets/AIETargetCDODirect.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@
//
//===----------------------------------------------------------------------===//

#include "aie/Targets/AIERTX.h"
#include "aie/Targets/AIERT.h"
#include "aie/Targets/AIETargets.h"
extern "C" {
#include "cdo-driver/cdo_driver.h"
Expand Down Expand Up @@ -73,7 +73,7 @@ generateCDOBinary(const StringRef outputPath,
return success();
}

static LogicalResult generateCDOBinariesSeparately(AIERTXControl &ctl,
static LogicalResult generateCDOBinariesSeparately(AIERTControl &ctl,
const StringRef workDirPath,
DeviceOp &targetOp,
bool aieSim,
Expand Down Expand Up @@ -104,7 +104,7 @@ static LogicalResult generateCDOBinariesSeparately(AIERTXControl &ctl,
return success();
}

static LogicalResult generateCDOUnified(AIERTXControl &ctl,
static LogicalResult generateCDOUnified(AIERTControl &ctl,
const StringRef workDirPath,
DeviceOp &targetOp, bool aieSim,
bool enableCores) {
Expand Down Expand Up @@ -141,7 +141,7 @@ translateToCDODirect(ModuleOp m, llvm::StringRef workDirPath,
// shim dma on tile (0,0) are hard-coded assumptions about NPU...
assert(targetModel.isNPU() && "Only NPU currently supported");

AIERTXControl ctl(targetModel);
AIERTControl ctl(targetModel);
if (failed(ctl.setIOBackend(aieSim, xaieDebug)))
return failure();
initializeCDOGenerator(endianness, cdoDebug);
Expand Down Expand Up @@ -319,9 +319,10 @@ parseTransactionBinary(const std::vector<uint8_t> &data,
return num_cols;
}

static LogicalResult
generateTxn(AIERTXControl &ctl, const StringRef workDirPath, DeviceOp &targetOp,
bool aieSim, bool enableElfs, bool enableInit, bool enableCores) {
static LogicalResult generateTxn(AIERTControl &ctl, const StringRef workDirPath,
DeviceOp &targetOp, bool aieSim,
bool enableElfs, bool enableInit,
bool enableCores) {
if (enableElfs && !targetOp.getOps<CoreOp>().empty() &&
failed(ctl.addAieElfs(targetOp, workDirPath, aieSim)))
return failure();
Expand All @@ -348,7 +349,7 @@ static LogicalResult translateToTxn(ModuleOp m, std::vector<uint8_t> &output,
if (!targetModel.isNPU())
return failure();

AIERTXControl ctl(targetModel);
AIERTControl ctl(targetModel);
if (failed(ctl.setIOBackend(aieSim, xaieDebug)))
return failure();

Expand Down
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