Merge pull request #133 from XavierAubert/cv32e40p/dev

Cv32e40p/dev
XavierAubert · Jan 25, 2024 · 69c1e7e · 69c1e7e
2 parents c4be393 + 3caf9b8
commit 69c1e7e
Show file tree

Hide file tree

Showing 3 changed files with 20 additions and 8 deletions.
diff --git a/cv32e40p/env/uvme/uvme_cv32e40p_tdefs.sv b/cv32e40p/env/uvme/uvme_cv32e40p_tdefs.sv
@@ -115,7 +115,8 @@ typedef struct {
 } ins_t;
 
 
-typedef logic [7:0]  mem_arr[2**22];
+// UVME_CV32E40P_MEM_SIZE is defined in uvme_cv32e40p_macros.sv
+typedef logic [7:0]  mem_arr[2**`UVME_CV32E40P_MEM_SIZE];
 
 typedef enum {
     FETCH_CONSTANT,

diff --git a/cv32e40p/tb/uvmt/uvmt_cv32e40p_debug_assert.sv b/cv32e40p/tb/uvmt/uvmt_cv32e40p_debug_assert.sv
@@ -125,6 +125,17 @@ module uvmt_cv32e40p_debug_assert
         else
             `uvm_error(info_tag,$sformatf("Debug mode with wrong cause after ebreak, case = %d",cov_assert_if.dcsr_q[8:6]));
 
+    ////////////////////////////////////////////////////////////////////////////
+    // It appears that the properties "p_cebreak_exception" and
+    // "p_ebreak_exception" are identical in all but name.  However, those two
+    // properties are not duplicate as they are using two different instruction
+    // decoding signals:
+    //    - property p_ebreak_exception uses i_ebreak.
+    //    - property p_cebreak_exception uses i_cebreak which differs thanks to
+    //      cov_assert_if.id_stage_is_compressed value.
+    //
+
+
     // c.ebreak without dcsr.ebreakm results in exception at mtvec
     // Exclude single stepping as the sequence gets very complicated
     property p_cebreak_exception;
@@ -135,7 +146,7 @@ module uvmt_cv32e40p_debug_assert
                                                                 && (cov_assert_if.mepc_q == pc_at_ebreak) &&
                                                                    (cov_assert_if.id_stage_pc == cov_assert_if.mtvec);
     endproperty
-    
+
     a_cebreak_exception: assert property(p_cebreak_exception)
         else
             `uvm_error(info_tag,$sformatf("Exception not entered correctly after c.ebreak with dcsr.ebreak=0"));
@@ -150,7 +161,7 @@ module uvmt_cv32e40p_debug_assert
                                                                 && (cov_assert_if.mepc_q == pc_at_ebreak) &&
                                                                    (cov_assert_if.id_stage_pc == cov_assert_if.mtvec);
     endproperty
-    
+
     // TODO: Fails formal as above
     a_ebreak_exception: assert property(p_ebreak_exception)
         else

diff --git a/lib/uvm_agents/uvma_obi_memory/src/comps/uvma_obi_memory_cov_model.sv b/lib/uvm_agents/uvma_obi_memory/src/comps/uvma_obi_memory_cov_model.sv
@@ -49,23 +49,23 @@ covergroup cg_obi(string name,
    option.name         = name;
 
    we: coverpoint (trn.access_type) {
-      ignore_bins IGN_WRITE = {UVMA_OBI_MEMORY_ACCESS_WRITE} with ((item>1) && (!write_enabled));
-      ignore_bins IGN_READ =  {UVMA_OBI_MEMORY_ACCESS_READ}  with ((item>1) && (!read_enabled));
+      ignore_bins IGN_WRITE = {UVMA_OBI_MEMORY_ACCESS_WRITE} with ((item >= 0) && (!write_enabled));
+      ignore_bins IGN_READ  = {UVMA_OBI_MEMORY_ACCESS_READ}  with ((item >= 0) && (!read_enabled));
       bins WRITE = {UVMA_OBI_MEMORY_ACCESS_WRITE};
       bins READ = {UVMA_OBI_MEMORY_ACCESS_READ};
    }
 
    memtype: coverpoint (trn.memtype) {
-      ignore_bins IGN_MEMTYPE = {[0:$]} with ((item>1) && (!is_1p2));
+      ignore_bins IGN_MEMTYPE = {[0:$]} with ((item >= 0) && (!is_1p2));
    }
 
    prot: coverpoint (trn.prot) {
-      ignore_bins IGN_MEMTYPE = {[0:$]} with ((item>1) && (!is_1p2));
+      ignore_bins IGN_MEMTYPE = {[0:$]} with ((item >= 0) && (!is_1p2));
       ignore_bins IGN_RSVD_PRIV = {3'b100, 3'b101};
    }
 
    err: coverpoint (trn.err) {
-      ignore_bins IGN_ERR = {[0:$]} with ((item>1) && (!is_1p2));
+      ignore_bins IGN_ERR = {[0:$]} with ((item >=0 ) && (!is_1p2));
    }
 
 endgroup : cg_obi