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[spec] Fix instruction table (#1402)
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@rossberg
rossberg committed Dec 2, 2021
1 parent 9849315 commit 2460ad0
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Showing 2 changed files with 20 additions and 36 deletions.
28 changes: 10 additions & 18 deletions document/core/appendix/gen-index-instructions.py
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Original file line number Diff line number Diff line change
Expand Up @@ -331,25 +331,17 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat
Instruction(r'\TABLEGROW~x', r'\hex{FC}~\hex{0F}', r'[t~\I32] \to [\I32]', r'valid-table.grow', r'exec-table.grow'),
Instruction(r'\TABLESIZE~x', r'\hex{FC}~\hex{10}', r'[] \to [\I32]', r'valid-table.size', r'exec-table.size'),
Instruction(r'\TABLEFILL~x', r'\hex{FC}~\hex{11}', r'[\I32~t~\I32] \to []', r'valid-table.fill', r'exec-table.fill'),
Instruction(r'\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}', r'\hex{FC}~~0', r'[\F32] \to [\I32]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_s'),
Instruction(r'\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}', r'\hex{FC}~~1', r'[\F32] \to [\I32]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_u'),
Instruction(r'\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}', r'\hex{FC}~~2', r'[\F64] \to [\I32]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_s'),
Instruction(r'\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}', r'\hex{FC}~~3', r'[\F64] \to [\I32]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_u'),
Instruction(r'\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}', r'\hex{FC}~~4', r'[\F32] \to [\I64]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_s'),
Instruction(r'\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}', r'\hex{FC}~~5', r'[\F32] \to [\I64]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_u'),
Instruction(r'\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}', r'\hex{FC}~~6', r'[\F64] \to [\I64]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_s'),
Instruction(r'\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}', r'\hex{FC}~~7', r'[\F64] \to [\I64]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_u'),
Instruction(r'\V128.\LOAD~\memarg', r'\hex{FD}~~\hex{00}', r'[\I32] \to [\V128]', r'valid-load', r'exec-load'),
Instruction(r'\I16X8.\LOAD\K{8x8\_s}~\memarg', r'\hex{FD}~~\hex{01}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'),
Instruction(r'\I16X8.\LOAD\K{8x8\_u}~\memarg', r'\hex{FD}~~\hex{02}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'),
Instruction(r'\I32X4.\LOAD\K{16x4\_s}~\memarg', r'\hex{FD}~~\hex{03}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'),
Instruction(r'\I32X4.\LOAD\K{16x4\_u}~\memarg', r'\hex{FD}~~\hex{04}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'),
Instruction(r'\I64X2.\LOAD\K{32x2\_s}~\memarg', r'\hex{FD}~~\hex{05}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'),
Instruction(r'\I64X2.\LOAD\K{32x2\_u}~\memarg', r'\hex{FD}~~\hex{06}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'),
Instruction(r'\I8X16.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~\hex{07}', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'),
Instruction(r'\I16X8.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~\hex{08}', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'),
Instruction(r'\I32X4.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~\hex{09}', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'),
Instruction(r'\I64X2.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~\hex{0A}', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'),
Instruction(r'\V128.\LOAD\K{8x8\_s}~\memarg', r'\hex{FD}~~\hex{01}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'),
Instruction(r'\V128.\LOAD\K{8x8\_u}~\memarg', r'\hex{FD}~~\hex{02}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'),
Instruction(r'\V128.\LOAD\K{16x4\_s}~\memarg', r'\hex{FD}~~\hex{03}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'),
Instruction(r'\V128.\LOAD\K{16x4\_u}~\memarg', r'\hex{FD}~~\hex{04}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'),
Instruction(r'\V128.\LOAD\K{32x2\_s}~\memarg', r'\hex{FD}~~\hex{05}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'),
Instruction(r'\V128.\LOAD\K{32x2\_u}~\memarg', r'\hex{FD}~~\hex{06}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'),
Instruction(r'\V128.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~\hex{07}', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'),
Instruction(r'\V128.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~\hex{08}', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'),
Instruction(r'\V128.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~\hex{09}', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'),
Instruction(r'\V128.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~\hex{0A}', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'),
Instruction(r'\V128.\STORE~\memarg', r'\hex{FD}~~\hex{0B}', r'[\I32~\V128] \to []', r'valid-store', r'exec-store'),
Instruction(r'\V128.\VCONST~\i128', r'\hex{FD}~~\hex{0C}', r'[] \to [\V128]', r'valid-vconst', r'exec-vconst'),
Instruction(r'\I8X16.\SHUFFLE~\laneidx^{16}', r'\hex{FD}~~\hex{0D}', r'[\V128~\V128] \to [\V128]', r'valid-vec-shuffle', r'exec-vec-shuffle'),
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28 changes: 10 additions & 18 deletions document/core/appendix/index-instructions.rst
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Original file line number Diff line number Diff line change
Expand Up @@ -279,25 +279,17 @@ Instruction Binary Opcode T
:math:`\TABLEGROW~x` :math:`\hex{FC}~\hex{0F}` :math:`[t~\I32] \to [\I32]` :ref:`validation <valid-table.grow>` :ref:`execution <exec-table.grow>`
:math:`\TABLESIZE~x` :math:`\hex{FC}~\hex{10}` :math:`[] \to [\I32]` :ref:`validation <valid-table.size>` :ref:`execution <exec-table.size>`
:math:`\TABLEFILL~x` :math:`\hex{FC}~\hex{11}` :math:`[\I32~t~\I32] \to []` :ref:`validation <valid-table.fill>` :ref:`execution <exec-table.fill>`
:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~0` :math:`[\F32] \to [\I32]` :ref:`validation <valid-cvtop>` :ref:`execution <exec-cvtop>`, :ref:`operator <op-trunc_sat_s>`
:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~1` :math:`[\F32] \to [\I32]` :ref:`validation <valid-cvtop>` :ref:`execution <exec-cvtop>`, :ref:`operator <op-trunc_sat_u>`
:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~~2` :math:`[\F64] \to [\I32]` :ref:`validation <valid-cvtop>` :ref:`execution <exec-cvtop>`, :ref:`operator <op-trunc_sat_s>`
:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~3` :math:`[\F64] \to [\I32]` :ref:`validation <valid-cvtop>` :ref:`execution <exec-cvtop>`, :ref:`operator <op-trunc_sat_u>`
:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~4` :math:`[\F32] \to [\I64]` :ref:`validation <valid-cvtop>` :ref:`execution <exec-cvtop>`, :ref:`operator <op-trunc_sat_s>`
:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~5` :math:`[\F32] \to [\I64]` :ref:`validation <valid-cvtop>` :ref:`execution <exec-cvtop>`, :ref:`operator <op-trunc_sat_u>`
:math:`\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}` :math:`\hex{FC}~~6` :math:`[\F64] \to [\I64]` :ref:`validation <valid-cvtop>` :ref:`execution <exec-cvtop>`, :ref:`operator <op-trunc_sat_s>`
:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~7` :math:`[\F64] \to [\I64]` :ref:`validation <valid-cvtop>` :ref:`execution <exec-cvtop>`, :ref:`operator <op-trunc_sat_u>`
:math:`\V128.\LOAD~\memarg` :math:`\hex{FD}~~\hex{00}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load>` :ref:`execution <exec-load>`
:math:`\I16X8.\LOAD\K{8x8\_s}~\memarg` :math:`\hex{FD}~~\hex{01}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-extend>` :ref:`execution <exec-load-extend>`
:math:`\I16X8.\LOAD\K{8x8\_u}~\memarg` :math:`\hex{FD}~~\hex{02}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-extend>` :ref:`execution <exec-load-extend>`
:math:`\I32X4.\LOAD\K{16x4\_s}~\memarg` :math:`\hex{FD}~~\hex{03}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-extend>` :ref:`execution <exec-load-extend>`
:math:`\I32X4.\LOAD\K{16x4\_u}~\memarg` :math:`\hex{FD}~~\hex{04}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-extend>` :ref:`execution <exec-load-extend>`
:math:`\I64X2.\LOAD\K{32x2\_s}~\memarg` :math:`\hex{FD}~~\hex{05}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-extend>` :ref:`execution <exec-load-extend>`
:math:`\I64X2.\LOAD\K{32x2\_u}~\memarg` :math:`\hex{FD}~~\hex{06}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-extend>` :ref:`execution <exec-load-extend>`
:math:`\I8X16.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{07}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-splat>` :ref:`execution <exec-load-splat>`
:math:`\I16X8.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{08}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-splat>` :ref:`execution <exec-load-splat>`
:math:`\I32X4.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{09}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-splat>` :ref:`execution <exec-load-splat>`
:math:`\I64X2.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{0A}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-splat>` :ref:`execution <exec-load-splat>`
:math:`\V128.\LOAD\K{8x8\_s}~\memarg` :math:`\hex{FD}~~\hex{01}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-extend>` :ref:`execution <exec-load-extend>`
:math:`\V128.\LOAD\K{8x8\_u}~\memarg` :math:`\hex{FD}~~\hex{02}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-extend>` :ref:`execution <exec-load-extend>`
:math:`\V128.\LOAD\K{16x4\_s}~\memarg` :math:`\hex{FD}~~\hex{03}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-extend>` :ref:`execution <exec-load-extend>`
:math:`\V128.\LOAD\K{16x4\_u}~\memarg` :math:`\hex{FD}~~\hex{04}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-extend>` :ref:`execution <exec-load-extend>`
:math:`\V128.\LOAD\K{32x2\_s}~\memarg` :math:`\hex{FD}~~\hex{05}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-extend>` :ref:`execution <exec-load-extend>`
:math:`\V128.\LOAD\K{32x2\_u}~\memarg` :math:`\hex{FD}~~\hex{06}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-extend>` :ref:`execution <exec-load-extend>`
:math:`\V128.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{07}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-splat>` :ref:`execution <exec-load-splat>`
:math:`\V128.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{08}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-splat>` :ref:`execution <exec-load-splat>`
:math:`\V128.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{09}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-splat>` :ref:`execution <exec-load-splat>`
:math:`\V128.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{0A}` :math:`[\I32] \to [\V128]` :ref:`validation <valid-load-splat>` :ref:`execution <exec-load-splat>`
:math:`\V128.\STORE~\memarg` :math:`\hex{FD}~~\hex{0B}` :math:`[\I32~\V128] \to []` :ref:`validation <valid-store>` :ref:`execution <exec-store>`
:math:`\V128.\VCONST~\i128` :math:`\hex{FD}~~\hex{0C}` :math:`[] \to [\V128]` :ref:`validation <valid-vconst>` :ref:`execution <exec-vconst>`
:math:`\I8X16.\SHUFFLE~\laneidx^{16}` :math:`\hex{FD}~~\hex{0D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation <valid-vec-shuffle>` :ref:`execution <exec-vec-shuffle>`
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