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clippy
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Twinklebear committed Nov 6, 2023
1 parent 1169869 commit a0e5122
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Showing 4 changed files with 4 additions and 4 deletions.
2 changes: 1 addition & 1 deletion examples/ddvol/build.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@ extern crate ispc;

fn main() {
let mut cfg = ispc::Config::new();
let ispc_files = vec![
let ispc_files = [
"src/ddvol.ispc",
"src/vol.ispc",
"src/camera.ispc",
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2 changes: 1 addition & 1 deletion examples/multi_file/build.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@ extern crate ispc;
fn main() {
let mut cfg = ispc::Config::new();
// Only re-run the build script if the ISPC files have been changed
let ispc_files = vec!["src/file_a.ispc", "src/file_b.ispc"];
let ispc_files = ["src/file_a.ispc", "src/file_b.ispc"];
for s in &ispc_files[..] {
cfg.file(*s);
}
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2 changes: 1 addition & 1 deletion examples/rt/build.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@ extern crate ispc;

fn main() {
let mut cfg = ispc::Config::new();
let ispc_files = vec![
let ispc_files = [
"src/rt.ispc",
"src/geom.ispc",
"src/material.ispc",
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2 changes: 1 addition & 1 deletion examples/simple/build.rs
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ fn link_ispc() {
use ispc_compile::TargetISA;

#[cfg(target_arch = "x86_64")]
let target_isas = vec![
let target_isas = [
TargetISA::SSE2i32x4,
TargetISA::SSE4i32x4,
TargetISA::AVX1i32x8,
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