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feat: update project tt_um_rejunity_vga_test01 from rejunity/tt08-vga…
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…-drop

Commit: 1b0ec59b7b894bde70c3c29beec77c16ede98361
Workflow: https://github.com/rejunity/tt08-vga-drop/actions/runs/10744204786
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TinyTapeoutBot authored and urish committed Sep 6, 2024
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4 changes: 2 additions & 2 deletions projects/tt_um_rejunity_vga_test01/commit_id.json
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@@ -1,8 +1,8 @@
{
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"commit": "1f90a4e3fac4f191d68dafe3dbab2a00e8bbf857",
"workflow_url": "https://github.com/rejunity/tt08-vga-drop/actions/runs/10743969495",
"commit": "1b0ec59b7b894bde70c3c29beec77c16ede98361",
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"pdk_version": "open_pdks bdc9412b3e468c102d01b7cf6337be06ec6e9c9a"
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234 changes: 117 additions & 117 deletions projects/tt_um_rejunity_vga_test01/stats/metrics.csv
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timing__unannotated_net__count__corner:max_ss_100C_1v60,25
timing__unannotated_net_filtered__count__corner:max_ss_100C_1v60,0
design__max_slew_violation__count__corner:max_ff_n40C_1v95,0
design__max_fanout_violation__count__corner:max_ff_n40C_1v95,4
design__max_cap_violation__count__corner:max_ff_n40C_1v95,0
clock__skew__worst_hold__corner:max_ff_n40C_1v95,0.031426
clock__skew__worst_setup__corner:max_ff_n40C_1v95,0.031426
timing__hold__ws__corner:max_ff_n40C_1v95,0.125242
timing__setup__ws__corner:max_ff_n40C_1v95,18.906693
clock__skew__worst_hold__corner:max_ff_n40C_1v95,-0.022771
clock__skew__worst_setup__corner:max_ff_n40C_1v95,-0.022771
timing__hold__ws__corner:max_ff_n40C_1v95,0.121588
timing__setup__ws__corner:max_ff_n40C_1v95,19.036316
timing__hold__tns__corner:max_ff_n40C_1v95,0.0
timing__setup__tns__corner:max_ff_n40C_1v95,0.0
timing__hold__wns__corner:max_ff_n40C_1v95,0.0
timing__setup__wns__corner:max_ff_n40C_1v95,0.0
timing__hold_vio__count__corner:max_ff_n40C_1v95,0
timing__hold_r2r__ws__corner:max_ff_n40C_1v95,0.125242
timing__hold_r2r__ws__corner:max_ff_n40C_1v95,0.121588
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95,0
timing__setup_vio__count__corner:max_ff_n40C_1v95,0
timing__setup_r2r__ws__corner:max_ff_n40C_1v95,38.352924
timing__setup_r2r__ws__corner:max_ff_n40C_1v95,38.726048
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95,0
timing__unannotated_net__count__corner:max_ff_n40C_1v95,25
timing__unannotated_net_filtered__count__corner:max_ff_n40C_1v95,0
timing__unannotated_net__count,25
timing__unannotated_net_filtered__count,0
design_powergrid__voltage__worst__net:VPWR__corner:nom_tt_025C_1v80,1.79974
design_powergrid__voltage__worst__net:VPWR__corner:nom_tt_025C_1v80,1.79953
design_powergrid__drop__average__net:VPWR__corner:nom_tt_025C_1v80,1.79997
design_powergrid__drop__worst__net:VPWR__corner:nom_tt_025C_1v80,0.00025738
design_powergrid__voltage__worst__net:VGND__corner:nom_tt_025C_1v80,0.000242332
design_powergrid__drop__average__net:VGND__corner:nom_tt_025C_1v80,0.0000281384
design_powergrid__drop__worst__net:VGND__corner:nom_tt_025C_1v80,0.000242332
design_powergrid__drop__worst__net:VPWR__corner:nom_tt_025C_1v80,0.000469427
design_powergrid__voltage__worst__net:VGND__corner:nom_tt_025C_1v80,0.000428571
design_powergrid__drop__average__net:VGND__corner:nom_tt_025C_1v80,0.0000328993
design_powergrid__drop__worst__net:VGND__corner:nom_tt_025C_1v80,0.000428571
ir__voltage__worst,1.8000000000000000444089209850062616169452667236328125
ir__drop__avg,0.00002860000000000000061162012954252276131228427402675151824951171875
ir__drop__worst,0.0002570000000000000127224619728139032304170541465282440185546875
ir__drop__avg,0.000033500000000000001131039706336878225556574761867523193359375
ir__drop__worst,0.00046900000000000001583455588871629515779204666614532470703125
magic__drc_error__count,0
magic__illegal_overlap__count,0
design__lvs_device_difference__count,0
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