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\ stm8ef : i2c loader MM-171129 | ||
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#include voc-i2c-core.fs | ||
#include voc-i2c.fs | ||
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\ stm8ef : voc-i2c-core.fs MM-170928 | ||
\ ------------------------------------------------------------------------------ | ||
\ I2C Library, Core Word Set, Bit-Bang Implementation | ||
\ | ||
\ Copyright (C) 2017 manfred.mahlow@forth-ev.de | ||
\ | ||
\ Requires: * STM8S eForth on STM8S103xy | ||
\ * e4thcom -t stm8ef | ||
\ | ||
\ Uses: PB5 as serial data pin (SDA) | ||
\ PB4 as serial clock pin (SCL) | ||
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\ I2C clock frequency : ? | ||
\ | ||
\ External pull-up resistors of 10 kOhm are required on the SDA and SCL pins. | ||
\ | ||
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#require VOC \ requires the persistent patch for context switching, see CURRENT | ||
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#require CONSTANT | ||
#require :NVM | ||
#require ALIAS | ||
#require ]B! | ||
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\res MCU: STM8S103 | ||
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RAM | ||
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\res export PB_IDR PB_ODR PB_DDR | ||
\res export BIT5 | ||
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:NVM ( -- ) [ 0 PB_DDR 5 ]B! ;RAM ALIAS SDA1 | ||
:NVM ( -- ) [ 1 PB_DDR 5 ]B! ;RAM ALIAS SDA0 | ||
:NVM ( -- f ) PB_IDR C@ BIT5 AND ;RAM ALIAS SDA? | ||
:NVM ( -- ) [ 0 PB_DDR 4 ]B! ;RAM ALIAS SCL1 | ||
:NVM ( -- ) [ 1 PB_DDR 4 ]B! ;RAM ALIAS SCL0 | ||
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NVM | ||
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VOC i2c i2c DEFINITIONS | ||
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: init ( -- ) | ||
\ Initialize the I2C Bus interface | ||
SDA1 SCL1 \ enable I2C pins as input | ||
[ 0 PB_ODR 5 ]B! [ 0 PB_ODR 4 ]B! \ set output registers low | ||
; | ||
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\ : wait ( -- ) ; | ||
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: start ( -- ) \ in: SDA=? SCL=? out: SDA=SCL=0 | ||
\ Start an I2C Bus transmission. | ||
SDA1 SCL1 ( wait ) SDA0 ( wait ) SCL0 ; | ||
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: stop ( -- ) | ||
\ Stop an I2C Bus transmission. | ||
SDA0 ( wait ) SCL1 ( wait ) SDA1 ; | ||
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: tx ( byte -- ) | ||
\ Send a byte to the I2C Bus. | ||
7 FOR DUP $80 AND IF SDA1 ELSE SDA0 THEN ( wait ) SCL1 ( wait ) SCL0 2* NEXT | ||
DROP ; | ||
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: nak? ( -- f ) \ in: SDA=? SCL=0 out: SDA=1 SCL=0 | ||
\ Return a true/false flag if an NAK/ACK was received from the I2C Bus. | ||
SDA1 ( wait ) SCL1 ( wait ) SDA? SCL0 ; | ||
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: rx ( -- byte ) \ in: SDA=1 SCL=0 out: SDA=? SCL=0 | ||
\ Receive a byte from the I2C Bus. | ||
0 7 FOR ( wait ) SCL1 ( wait ) SDA? SCL0 IF 1 ELSE 0 THEN SWAP 2* OR NEXT ; | ||
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: nak ( -- ) \ in: SDA=? SCL=0 out: SDA=1 SCL=0 | ||
\ Send an NAK to the I2C Bus. | ||
SDA1 ( wait ) SCL1 ( wait ) SCL0 ; | ||
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: ack ( -- ) \ in: SDA=? SCL=0 out: SDA=1 SCL=0 | ||
\ Send an ACK to the I2C Bus. | ||
SDA0 ( wait ) SCL1 ( wait ) SCL0 SDA1 ; | ||
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: rdy ( sid -- f ) | ||
\ Send a start/stop sequence with the slave address sid and return true if an | ||
\ ACK is returned. Otherwise return a false flag. | ||
2* i2c start i2c tx i2c nak? 0= i2c stop ; | ||
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FORTH DEFINITIONS | ||
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RAM WIPE | ||
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i2c init | ||
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\index i2c rdy . i2c init i2c WORDS | ||
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\ ------------------------------------------------------------------------------ | ||
\ Last Revision: MM-171121 B! --> ]B! | ||
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\ stm8ef : I2C Example, rudiments of an EEPROM Library MM-171129 | ||
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#require i2c | ||
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RAM | ||
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#require CONSTANT | ||
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i2c DEFINITIONS | ||
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NVM | ||
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VOC eeprom i2c eeprom DEFINITIONS | ||
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$50 CONSTANT sid | ||
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: C@ ( a -- c ) 1 SWAP i2c eeprom sid i2c read ; | ||
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: C! ( c a -- ) 2 i2c eeprom sid i2c write ; | ||
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FORTH DEFINITIONS | ||
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RAM WIPE | ||
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\index i2c init i2c eeprom WORDS i2c WORDS | ||
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\ stm8ef : voc-i2c.fs MM-170928 | ||
\ ------------------------------------------------------------------------------ | ||
\ I2C Library, Extended Word Set ( extends voc-i2c-core.fs ) | ||
\ | ||
\ Copyright (C) 2017 manfred.mahlow@forth-ev.de | ||
\ | ||
\ Requires: * STM8S eForth on STM8S103xy | ||
\ * e4thcom -t stm8ef | ||
\ * voc-i2c-core-fs | ||
\ | ||
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\ #require LSHIFT | ||
\ #require RSHIFT | ||
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#require WIPE | ||
#require ABORT" | ||
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NVM i2c DEFINITIONS | ||
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BASE @ HEX | ||
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: ?ack ( -- ) | ||
\ Throw an error if no ACK was received. | ||
i2c nak? DUP IF i2c stop THEN ABORT" I2C: ACK missing" | ||
; | ||
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: out ( cn .. c1 +n sid -- ) | ||
\ Send sid and +n bytes without start and stop condition to an I2C slave. sid | ||
\ is the slaves 7 bit id or addr. An ambiguous condition exists for n = 0. | ||
2* ( r/w bit = 0 ) SWAP FOR i2c tx i2c ?ack NEXT | ||
; | ||
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: write ( cn .. c1 +n sid -- ) | ||
\ Send sid and +n bytes with start and stop condition to an I2C slave. sid is | ||
\ the slaves 7 bit id or addr. An ambiguous condition exists for n = 0. | ||
i2c start i2c out i2c stop ; | ||
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: in ( +n sid -- c1 .. cn ) | ||
\ Read +n bytes from I2C slave sid. Do not send a start or stop condition. An | ||
\ ambiguous condition exists for n = 0. | ||
2* 1 OR i2c tx i2c ?ack 1 - FOR i2c rx R@ IF i2c ack ELSE i2c nak THEN NEXT ; | ||
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: read ( +n c|a sid -- c1 .. cn ) | ||
\ Send the command or address byte c|a to the I2C slave sid and read +n bytes | ||
\ back. sid is the slaves 7 bit identifier or address. An ambiguous condition | ||
\ exists for n = 0. | ||
>R 1 R@ i2c start i2c out \ send c|a | ||
R> i2c start i2c in i2c stop ; \ read data bytes | ||
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\ A dummy for compatibility with the hardware based I2C version. | ||
: ?busy ( -- ) ; | ||
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BASE ! | ||
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FORTH DEFINITIONS | ||
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RAM WIPE | ||
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\ ------------------------------------------------------------------------------ | ||
\ Last Revision: MM-171129 Comment updated | ||
\ MM-170928 ported from noForth V | ||
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