Updating documentation on CPU detection

- found an error in the opcodes: RTI takes only 6 cycles, not 7 - CPU detection debug now has better line numbering Signed-off-by: Sven Oliver Moll <svolli@svolli.de>
SvOlli · Oct 3, 2024 · e10448d · e10448d
1 parent d4345d5
commit e10448d
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diff --git a/doc/cpu_detect.md b/doc/cpu_detect.md
diff --git a/doc/opcodes6502.csv b/doc/opcodes6502.csv
@@ -3,7 +3,7 @@ $00;BRK;#IM;;2;7;;;1
 $10;BPL;REL;;2;2;2;;2
 $20;JSR;ABS;;3;6;;;1
 $30;BMI;REL;;2;2;2;;2
-$40;RTI;;;1;7;;;1
+$40;RTI;;;1;6;;;1
 $50;BVC;REL;;2;2;2;;2
 $60;RTS;;;1;6;;;1
 $70;BVS;REL;;2;2;2;;2

diff --git a/doc/opcodes65816.csv b/doc/opcodes65816.csv
@@ -3,7 +3,7 @@ $00;BRK;#IM;;2;7;;;1
 $10;BPL;REL;;2;2;2;;2
 $20;JSR;ABS;;3;6;;;1
 $30;BMI;REL;;2;2;2;;2
-$40;RTI;;;1;7;;;1
+$40;RTI;;;1;6;;;1
 $50;BVC;REL;;2;2;2;;2
 $60;RTS;;;1;6;;;1
 $70;BVS;REL;;2;2;2;;2

diff --git a/doc/opcodes65c02.csv b/doc/opcodes65c02.csv
@@ -3,7 +3,7 @@ $00;BRK;#IM;;2;7;;;1
 $10;BPL;REL;;2;2;2;;2
 $20;JSR;ABS;;3;6;;;1
 $30;BMI;REL;;2;2;2;;2
-$40;RTI;;;1;7;;;1
+$40;RTI;;;1;6;;;1
 $50;BVC;REL;;2;2;2;;2
 $60;RTS;;;1;6;;;1
 $70;BVS;REL;;2;2;2;;2

diff --git a/doc/opcodes65sc02.csv b/doc/opcodes65sc02.csv
@@ -3,7 +3,7 @@ $00;BRK;#IM;;2;7;;;1
 $10;BPL;REL;;2;2;2;;2
 $20;JSR;ABS;;3;6;;;1
 $30;BMI;REL;;2;2;2;;2
-$40;RTI;;;1;7;;;1
+$40;RTI;;;1;6;;;1
 $50;BVC;REL;;2;2;2;;2
 $60;RTS;;;1;6;;;1
 $70;BVS;REL;;2;2;2;;2

diff --git a/src/rp2040/cpu_detect.c b/src/rp2040/cpu_detect.c
@@ -105,6 +105,7 @@ cputype_t cpu_detect( bool debug )
    cputype = (memory[sizeof(memory)-1] < CPU_UNDEF) ? memory[sizeof(memory)-1] : CPU_ERROR;
    if( debug )
    {
+      int lineno = 0;
       disass_cpu( cputype ? cputype : CPU_6502 );
       disass_historian_t d = disass_historian_init( &trace[0], cycles_total, 0 );
       printf( "cycles_total = %d\n", cycles_total );
@@ -114,7 +115,11 @@ cputype_t cpu_detect( bool debug )
          {
             break;
          }
-         printf( "%3d:%s:%s\n", i,
+         if( trace[i] & bus_config.mask_reset )
+         {
+            ++lineno;
+         }
+         printf( "%3d:%s:%s\n", lineno,
                  decode_trace( trace[i], false, 0 ),
                  disass_historian_entry( d, i ) );
       }

diff --git a/src/rp2040/opcodes6502.tab b/src/rp2040/opcodes6502.tab
@@ -64,7 +64,7 @@
    /* $3D */ OPCODE( "AND", ABSX, 0, 3, 4, 1, 0, 0 ),
    /* $3E */ OPCODE( "ROL", ABSX, 0, 3, 7, 1, 0, 0 ),
    /* $3F */ OPCODE( "RLA", ABSX, 1, 3, 7, 0, 0, 0 ),
-   /* $40 */ OPCODE( "RTI", IMP, 0, 1, 7, 0, 0, 1 ),
+   /* $40 */ OPCODE( "RTI", IMP, 0, 1, 6, 0, 0, 1 ),
    /* $41 */ OPCODE( "EOR", ZPIX, 0, 2, 6, 0, 0, 0 ),
    /* $42 */ OPCODE( "KIL", IMP, 1, 0, 0, 0, 0, 0 ),
    /* $43 */ OPCODE( "SRE", ZPIX, 1, 2, 8, 0, 0, 0 ),

diff --git a/src/rp2040/opcodes65816.tab b/src/rp2040/opcodes65816.tab
@@ -64,7 +64,7 @@
    /* $3D */ OPCODE( "AND", ABSX, 0, 3, 4, 1, 0, 0 ),
    /* $3E */ OPCODE( "ROL", ABSX, 0, 3, 7, 1, 0, 0 ),
    /* $3F */ OPCODE( "AND", ABSLX, 0, 4, 5, 0, 0, 0 ),
-   /* $40 */ OPCODE( "RTI", IMP, 0, 1, 7, 0, 0, 1 ),
+   /* $40 */ OPCODE( "RTI", IMP, 0, 1, 6, 0, 0, 1 ),
    /* $41 */ OPCODE( "EOR", ZPIX, 0, 2, 6, 0, 0, 0 ),
    /* $42 */ OPCODE( "WDM", IMM, 0, 2, 2, 0, 0, 0 ),
    /* $43 */ OPCODE( "EOR", ZPS, 0, 2, 4, 0, 0, 0 ),

diff --git a/src/rp2040/opcodes65c02.tab b/src/rp2040/opcodes65c02.tab
@@ -64,7 +64,7 @@
    /* $3D */ OPCODE( "AND", ABSX, 0, 3, 4, 1, 0, 0 ),
    /* $3E */ OPCODE( "ROL", ABSX, 0, 3, 7, 1, 0, 0 ),
    /* $3F */ OPCODE( "BBR", ZPNR, 0, 3, 5, 2, 0, 0 ),
-   /* $40 */ OPCODE( "RTI", IMP, 0, 1, 7, 0, 0, 1 ),
+   /* $40 */ OPCODE( "RTI", IMP, 0, 1, 6, 0, 0, 1 ),
    /* $41 */ OPCODE( "EOR", ZPIX, 0, 2, 6, 0, 0, 0 ),
    /* $42 */ OPCODE( "NOP", IMM, 1, 2, 2, 0, 0, 0 ),
    /* $43 */ OPCODE( "NOP", IMP, 1, 1, 1, 0, 0, 0 ),

diff --git a/src/rp2040/opcodes65sc02.tab b/src/rp2040/opcodes65sc02.tab
@@ -64,7 +64,7 @@
    /* $3D */ OPCODE( "AND", ABSX, 0, 3, 4, 1, 0, 0 ),
    /* $3E */ OPCODE( "ROL", ABSX, 0, 3, 7, 1, 0, 0 ),
    /* $3F */ OPCODE( "NOP", IMP, 1, 1, 1, 0, 0, 0 ),
-   /* $40 */ OPCODE( "RTI", IMP, 0, 1, 7, 0, 0, 1 ),
+   /* $40 */ OPCODE( "RTI", IMP, 0, 1, 6, 0, 0, 1 ),
    /* $41 */ OPCODE( "EOR", ZPIX, 0, 2, 6, 0, 0, 0 ),
    /* $42 */ OPCODE( "NOP", IMM, 1, 2, 2, 0, 0, 0 ),
    /* $43 */ OPCODE( "NOP", IMP, 1, 1, 1, 0, 0, 0 ),