Update simulation framework

[themperek]

• move clock generation from bus to test
• add parameters to set clocks
• add wait timer before/after a transaction 

[codecov]

Codecov Report

Merging #163 (f896706) into master (45e3552) will decrease coverage by 0.03%.
The diff coverage is 87.01%.

@@            Coverage Diff             @@
##           master     #163      +/-   ##
==========================================
- Coverage   38.96%   38.93%   -0.04%     
==========================================
  Files          73       73              
  Lines        4827     4808      -19     
==========================================
- Hits         1881     1872       -9     
+ Misses       2946     2936      -10     

Impacted Files	Coverage Δ
basil/utils/sim/SiLibUsb.py	0.00% <0.00%> (ø)
basil/utils/sim/SiLibUsbBusDriver.py	94.16% <87.50%> (-0.15%)	⬇️
basil/utils/sim/Test.py	81.70% <95.45%> (+11.25%)	⬆️
basil/utils/sim/BasilSbusDriver.py	97.18% <96.00%> (-1.54%)	⬇️
basil/utils/sim/BasilBusDriver.py	98.71% <100.00%> (-0.05%)	⬇️
basil/utils/sim/Protocol.py	100.00% <100.00%> (ø)

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