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community/blog/2024-01-22-exploring-cpu-microkernels-on-a-matmul-example/index.html

@@ -3855,7 +3855,11 @@ <h2 id="overview-of-the-compilation-and-linking-flow">Overview of the compilatio
   asm
   object
   vmfb
-end</code></pre>
+end
+
+style Part1 stroke:#FDD835,stroke-width:2px
+style Part2 stroke:#039BE5,stroke-width:2px
+style Part3 stroke:#43A047,stroke-width:2px</code></pre>
 <h2 id="part-1-mlir-code-generation">🟨 Part 1: MLIR code generation<a class="headerlink" href="#part-1-mlir-code-generation" title="Permanent link">link</a></h2>
 <p>Some initial boilerplate happens <em>around</em> our <code>linalg.matmul</code> before anything
 interesting happens <em>to</em> it.:</p>

community/blog/2024-01-29-iree-mlir-linalg-tutorial/index.html

@@ -3864,13 +3864,15 @@ <h3 id="static-shape-element-wise-addition-of-two-1d-arrays">Static-shape, eleme
   <code>--iree-hal-target-backends=</code>. You will then need to pass a matching
   <code>--device=</code> to <code>iree-run-module</code> below.</li>
 <li>To cross-compile, explore <code>--iree-llvmcpu-target-triple=</code>.</li>
-<li>To enable higher CPU performance by enabling CPU features:</li>
+<li>To enable higher CPU performance by enabling CPU features:<ul>
 <li>On x86, explore <code>--iree-llvmcpu-target-cpu=</code> (e.g.
-    <code>--iree-llvmcpu-target-cpu=znver4</code> to target AMD Zen4).</li>
+  <code>--iree-llvmcpu-target-cpu=znver4</code> to target AMD Zen4).</li>
 <li>On other architectures, explore <code>--iree-llvmcpu-target-cpu-features=</code>.</li>
 <li>To optimize for running on the same machine that the compilation ran
-    on, pass  <code>--iree-llvmcpu-target-cpu=host</code>. That works regardless of
-    CPU architecture.</li>
+  on, pass  <code>--iree-llvmcpu-target-cpu=host</code>. That works regardless of
+  CPU architecture.</li>
+</ul>
+</li>
 <li>Check out
   <a href="../../../developers/general/developer-tips/">these docs</a> for
   more useful <code>iree-compile</code> flags.</li>