riscv: s64ilp32: Add PHYS_ADDR_T_64BIT for MMU_SV39

MMU_SV39 in s64ilp32 could support the whole bits of PPN, which is beyond 32 bits. So, enable PHYS_ADDR_T_64BIT to use this hardware feature. Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Signed-off-by: Guo Ren <guoren@kernel.org>
RevySR · Feb 26, 2024 · a1f194d · a1f194d
1 parent 14ae946
commit a1f194d
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diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
@@ -353,6 +353,7 @@ config ARCH_RV64ILP32
 	depends on NONPORTABLE
 	select ARCH_SUPPORTS_INT128 if !$(cc-option,$(m64-flag) -D__SIZEOF_INT128__=0)
 	select 32BIT
+	select PHYS_ADDR_T_64BIT if !MMU_SV32
 	select MMU
 	select VDSO64ILP32
 	select ARCH_HAS_64ILP32_KERNEL

diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
@@ -115,6 +115,10 @@
 #define XIP_OFFSET		0
 #endif
 
+#ifndef CONFIG_MMU_SV32
+#define MAX_POSSIBLE_PHYSMEM_BITS 56
+#endif
+
 #ifndef __ASSEMBLY__
 
 #include <asm/page.h>